參數(shù)資料
型號(hào)： CLC031VEC
廠(chǎng)商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： 消費(fèi)家電
英文描述： SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancilliary Data FIFOs
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： TQFP-64
文件頁(yè)數(shù)： 30/31頁(yè)
文件大?。?/td> 383K
代理商： CLC031VEC
Application Information
(Continued)
The control voltage output from R
BB
is externally filtered by
the loop filter consisting of a 22.1k
resistor in series with a
10nF capacitor, combined in parallel with a 100pF capacitor.
This gives a loop bandwidth of 1.5kHz. Since the control
voltage is limited to around 2.1V, it requires a level shifter to
get the entire pull range on the VCXO. National’s LMC7101
is recommended with 100k
and 182k
resistors as shown
in
Figure 7
to provide a gain of 1.55, sufficient to drive a 3.3V
VCXO.
Recommended VCXOs from SaRonix (141 Jefferson Drive,
Menlo Park, CA 94025, USA) include the ST1308AAB-74.25
for high definition and the ST1307BAB-27.00 for standard
definition. Dual VCXOs require some supporting logic to
select the appropriate VCXO. This requires the use of
For-
mat[4]
(SD/HD) and
Lock Detect
, which are mapped at
power-on to I/O Port Bit 3 and I/O Port Bit 4, respectively.
These two signals pass through an AND gate (Fairchild
Semiconductor’s NC7SZ08 or similar). Its output is high
when both Lock Detect and Format[4] are high, which indi-
cates a valid high-definition signal is present. The VCXOs
are buffered to control the transition times and to allow easy
selection. The output of the AND gate is used to control the
Output Enable (OE) function of the buffers. The 74.25MHz
VCXO is buffered with the NC7SZ126 with the AND gate
output connected to the OE pin of the NC7SZ126, and the
27.00MHz VCXO is buffered with the NC7SZ125 with the
AND gate output connected to the OE pin of the NC7SZ125.
This circuit uses the 27.00MHz VCXO as default and en-
ables the 74.25MHz VCXO when a valid high-definition sig-
nal is present. The outputs from the buffers are daisy-
chained together and sent to the CLC031’s V
CLK
in addition
to other devices, such as the CLC030 serializer.
20020114
FIGURE 7. Using Dual VCXOs for VCLK Example
C
www.national.com
30
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