參數(shù)資料
型號(hào)： CLC031VEC
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 消費(fèi)家電
英文描述： SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancilliary Data FIFOs
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： TQFP-64
文件頁(yè)數(shù)： 10/31頁(yè)
文件大?。?/td> 383K
代理商： CLC031VEC
Timing Diagram
20020108
Device Operation
Introduction
The CLC031 SMPTE 292M/259M Digital Video Deserializer/
Decoder is used in digital video signal origination and desti-
nation equipment: cameras, video tape recorders, telecines,
editors, standards converters, video test and other equip-
ment. It decodes and converts serial SDTV or HDTV com-
ponent digital video signals into parallel format. The CLC031
decoder/deserializer processes serial digital video (SDV)
signals conforming to SMPTE 259M, SMPTE 344M (pro-
posed) or SMPTE 292M and operates at serial data rates of
270 Mbps, 360 Mbps, 540 Mbps, 1.483 Gbps and
1.485 Gbps. Corresponding parallel output data rates are
27.0 MHz, 36.0 MHz, 54.0 MHz, 74.176MHz and 74.25 MHz.
The CLC031 accepts ECL or LVDS serial data input signals.
Outputs signals are compatible with LVCMOS logic devices.
Note:
In the following explanations, these logical equiva-
lences are observed: ON
≡
Enabled
≡
Set
≡
True
≡
Logic_1
and OFF
≡
Disabled
≡
Reset
≡
False
≡
Logic_0.
VIDEO DATA PATH
The
Serial Data Inputs
(SDI) accept serial video data at
SMPTE 259M standard definition, SMPTE 344M (proposed)
or SMPTE 292M high-definition data rates. These inputs
accept standard ECL or LVDS signal levels and may be used
single-ended or differentially. Inputs may be DC or AC
coupled, as required, to devices and circuits supplying the
data. Recommended operating conditions and all input DC
and AC voltage and current specifications shall be observed
when designing the input coupling circuits.
For convenience, a reference bias source, pin name R
,
sets the reference current available from the input bias
source, pin name R
. The recommended nominal value of
R
is 4.75k
, 1%. R
is provided so that the SDI inputs
may be supplied DC bias voltage via external resistors when
the inputs are AC-coupled. The bias source should be
loaded with a resistance to the V
supply. The source
current available at R
is 200μA.
Figure 1
shows a typical
input biasing scheme using R
BB
and R
REF
.
C
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