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參數(shù)資料
| 型號： | CDCE913_1 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs |
| 中文描述： | 可編程1 - PLL頻率石英振蕩器時(shí)鐘合成器的1.8 V，2.5 V和3.3 V輸出 |
| 文件頁數(shù)： | 7/23頁 |
| 文件大小： | 428K |
| 代理商： | CDCE913_1 |
www.ti.com
PARAMETER MEASUREMENT INFORMATION
10 pF
LVCMOS
CDCE913
CDCEL913
1 k
W
1 k
W
LVCMOS
LVCMOS
CDCE913
CDCEL913
Typical Driver
Impedance
~ 32
W
Line Impedance
Zo = 50
W
Series
Termination
~ 18
W
CDCE913
CDCEL913
SCAS849A–JUNE 2007–REVISED AUGUST 2007
DEVICE CHARACTERISTICS (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
(1)
MAX
UNIT
CDCEL913 — LVCMOS PARAMETER for V
DDOUT
= 1.8 V – Mode
V
DDOUT
= 1.7 V, I
OH
= –0.1 mA
V
DDOUT
= 1.7 V, I
OH
= –4 mA
V
DDOUT
= 1.7 V, I
OH
= –8 mA
V
DDOUT
= 1.7 V, I
OL
= 0.1 mA
V
DDOUT
= 1.7 V, I
OL
= 4 mA
V
DDOUT
= 1.7 V, I
OL
= 8 mA
PLL bypass
1.6
V
OH
LVCMOS high-level output voltage
1.4
V
1.1
0.1
V
OL
LVCMOS low-level output voltage
0.3
V
0.6
t
PLH
, t
PHL
t
r
/t
f
t
jit(cc)
t
jit(per)
t
sk(o)
odc
Propagation delay
2.6
ns
Rise and fall time
Cycle-to-cycle jitter
(6)(7)
Peak-to-peak period jitter
(7)
Output skew
(8)
, See
Table 2
Output duty cycle
(9)
V
DDOUT
= 1.8 V (20%–80%)
1 PLL switching, Y2-to-Y3
0.7
ns
80
110
ps
1 PLL switching, Y2-to-Y3
100
130
ps
f
OUT
= 50 MHz; Y1-to-Y3
f
VCO
= 100 MHz; Pdiv = 1
50
ps
45%
55%
SDA/SCL PARAMETER
V
IK
I
IH
V
IH
V
IL
V
OL
C
I
SCL and SDA input clamp voltage
V
DD
= 1.7 V; I
I
= –18 mA
V
I
= V
DD
; V
DD
= 1.9 V
–1.2
V
SCL and SDA input current
SDA/SCL input high voltage
(10)
SDA/SCL input low voltage
(10)
±10
μ
A
0.7 V
DD
V
0.3 V
DD
0.2 V
DD
V
SDA low-level output voltage
I
OL
= 3 mA, V
DD
= 1.7 V
V
I
= 0 V or V
DD
V
SCL/SDA Input capacitance
3
10
pF
(6)
(7)
(8)
(9)
(10) SDA and SCL pins are 3.3 V tolerant.
10000 cycles.
Jitter depends on configuration. Jitter data is for input frequency = 27 MHz, f
= 108 MHz, f
= 27 MHz (measured at Y2).
The tsk(o) specification is only valid for equal loading of each bank of outputs, and the outputs are generated from the same divider.
odc depends on output rise and fall time (t
r
/t
f
); data sampled on rising edge (tr)
Figure 1. Test Load
Figure 2. Test Load for 50-
Board Environment
Copyright 2007, Texas Instruments Incorporated
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Product Folder Link(s):
CDCE913 CDCEL913
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| CDCE913PERF-EVM | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 CDCE913 Perf Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
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| CDCE913PW | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 Programmable 1PLL VCXO Clock Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDCE913PWG4 | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 Programmable 1-PLL VCXO Clock Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDCE913PWR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 Programmable 1PLL VCXO Clock Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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