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參數(shù)資料
| 型號： | CDCE913_1 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs |
| 中文描述： | 可編程1 - PLL頻率石英振蕩器時鐘合成器的1.8 V，2.5 V和3.3 V輸出 |
| 文件頁數(shù)： | 11/23頁 |
| 文件大小： | 428K |
| 代理商： | CDCE913_1 |
www.ti.com
DATA PROTOCOL
The device supports
Byte Write and Byte Read
and
Block Write and Block Read
operations.
COMMAND CODE DEFINITION
Generic Programming Sequence
1
S
7
1
1
A
8
1
A
1
P
Slave Address
Data Byte
MSB
LSB
MSB
LSB
S
Start Condition
Sr
Repeated Start Condition
1 = Read (Rd) From CDCE9xx Device; 0 = Write (Wr) to CDCE9xxx
A
Acknowledge (ACK = 0 and NACK =1)
P
Stop Condition
Master-to-Slave Transmission
Slave-to-Master Transmission
R/W
R/W
CDCE913
CDCEL913
SCAS849A–JUNE 2007–REVISED AUGUST 2007
For
Byte Write/Read
operations, the system controller can individually access addressed bytes.
For
Block Write/Read
operations, the bytes are accessed in sequential order from lowest to highest byte (with
most significant bit first) with the ability to stop after any complete byte has been transferred. The numbers of
Bytes read-out are defined by Byte Count in the Generic Configuration Register. At Block Read instruction, all
bytes defined in the Byte Count must be readout to correctly finish the read cycle.
Once a byte has been sent, it is written into the internal register and is effective immediately. This applies to
each transferred byte regardless of whether this is a
Byte Write
or a
Block Write
sequence.
If the EEPROM Write Cycle is initiated, the internal SDA registers are written into the EEPROM. During this Write
Cycle, data is not accepted at the SDA/SCL bus until the write cycle is completed. However, data can be read
out during the programming sequence (Byte Read or Block Read). The programming status can be monitored by
EEPIP
, byte 01h–bit 6.
The offset of the indexed byte is encoded in the command code, as described in
Table 5
.
Table 5. Slave Receiver Address (7 Bits)
DEVICE
CDCE913/CDCEL913
CDCE925/CDCEL925
CDCE937/CDCEL937
CDCE949/CDCEL949
A6
1
1
1
1
A5
1
1
1
1
A4
0
0
0
0
A3
0
0
1
1
A2
1
1
1
1
A1
(1)
0
0
0
0
A0
(1)
1
0
1
0
R/W
1/0
1/0
1/0
1/0
(1)
Address bits A0 and A1 are programmable via the SDA/SCL bus (byte
01
, bit [
1:0
]. This allows addressing up to 4 devices connected to
the same SDA/SCL bus. The least-significant bit of the address byte designates a write or read operation.
Table 6. Command Code Definition
BIT
DESCRIPTION
0 =
Block Read
or
Block Write
operation
1 =
Byte Read
or
Byte Write
operation
Byte Offset for
Byte Read
,
Block Read
,
Byte Write
and
Block Write
operation.
7
(6:0)
Figure 7. Generic Programming Sequence
Copyright 2007, Texas Instruments Incorporated
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Product Folder Link(s):
CDCE913 CDCEL913
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDCE913PERF-EVM | 功能描述:時鐘和定時器開發(fā)工具 CDCE913 Perf Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| CDCE913PERF-EVM | 制造商:Texas Instruments 功能描述:CDCE913, CLOCK GENERATOR, EVAL MODULE |
| CDCE913PW | 功能描述:時鐘合成器/抖動清除器 Programmable 1PLL VCXO Clock Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDCE913PWG4 | 功能描述:時鐘合成器/抖動清除器 Programmable 1-PLL VCXO Clock Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDCE913PWR | 功能描述:時鐘合成器/抖動清除器 Programmable 1PLL VCXO Clock Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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