參數(shù)資料
型號： CDB42L51
廠商： Cirrus Logic Inc
文件頁數(shù)： 32/43頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR CS42L51 CODEC
標(biāo)準包裝： 1
主要目的： 音頻編解碼器
嵌入式： 是，其它
已用 IC / 零件： CS42L51，CS8406，CS8415
主要屬性： 立體聲數(shù)字音頻發(fā)射器和接收器
次要屬性： 圖形用戶界面，S/PDIF 接口
已供物品： 板，CD
相關(guān)產(chǎn)品： CS42L51-DNZR-ND - IC CODEC STEREO W/HDPN AMP 32QFN
598-1627-ND - IC CODEC STEREO W/HDPN AMP 32QFN
CS42L51-CNZR-ND - IC CODEC LOW-V 24BIT 32-QFP
598-1045-ND - IC CODEC STEREO W/HDPN AMP 32QFN
其它名稱： 598-1005
38
DS679F1
CS42L51
4.4.8
On-Chip Charge Pump
An on-chip charge pump derives a negative supply voltage from the VA_HP supply. This provides dual
rail supplies allowing a full-scale output swing centered around ground and eliminates the need for large,
DC-blocking capacitors. Added benefits include greater pop suppression and improved low frequency
(bass) response.
Note: Series resistance in the path of the power supplies must be avoided. Any voltage
drop on the VA_HP supply will directly impact the derived negative voltage on the charge pump supply,
VSS_HP, and may result in clipping.
The FLYN and FLYP pins connect to internal switches that charges and discharges the external capacitor
attached, at a default switching frequency. This frequency may be adjusted in the control port registers.
Increasing the charge-pumping capacitor will slightly decease the pumping frequency. The capacitor con-
nected to VSS_HP acts as a charge reservoir for the negative supply as well as a filter for the ripple in-
duced by the charge pump. Increasing this capacitor will decrease the ripple on VSS_HP. Refer to the
typical connection diagrams in Figure 1 on page 10 or Figure 2 on page 11 for the recommended capacitor
values for the charge pump circuitry.
4.5
Serial Port Clocking
The CODEC serial audio interface port operates either as a slave or master. It accepts externally generated
clocks in slave mode and will generate synchronous clocks derived from an input master clock (MCLK) in
master mode.
The frequency of the MCLK must be an integer multiple of, and synchronous with, the system sample rate,
Fs. The LRCK frequency is equal to Fs, the frequency at which audio samples for each channel are clocked
into or out of the device.
The SPEED and MCLKDIV2 software control bits or the SDOUT/(M/S) and MCLKDIV2 stand-alone control
pins, configure the device to generate the proper clocks in Master Mode and receive the proper clocks in
Slave Mode. The value on the SDOUT pin is latched immediately after powering up in Hardware Mode.
Software
Controls:
Software
Control:
Hardware
Control:
Pin
Setting
Selection
“SDOUT, M/S” pin 29
47 k
Pull-down
Slave
47 k
Pull-up
Master
LO
No Divide
HI
MCLK is divided by 2 prior
to all internal circuitry.
相關(guān)PDF資料
PDF描述
GMM11DRKI CONN EDGECARD 22POS DIP .156 SLD
UPJ1J151MHD6TO CAP ALUM 150UF 63V 20% RADIAL
ECA22DTKI CONN EDGECARD 44POS DIP .125 SLD
M1TXK-3436J IDC CABLE - MSD34K/MC34G/X
GEM28DREI CONN EDGECARD 56POS .156 EYELET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB42L51/FAE 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk
CDB42L52 功能描述:音頻 IC 開發(fā)工具 Eval Bd LP CODEC w/classD Spkr Driver RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB42L52/FAE 制造商:Cirrus Logic 功能描述:EVAL BD LOW-VOLTAGE STEREO CODEC - Bulk
CDB42L55 功能描述:音頻 IC 開發(fā)工具 Eval Bd Ultra Low PWR Stereo Codec RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB42L56 功能描述:音頻 IC 開發(fā)工具 Eval Bd 24Bit Ultra LP Ster CD w/clH HP RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*