參數(shù)資料
型號(hào): CDB42L51
廠商: Cirrus Logic Inc
文件頁(yè)數(shù): 27/43頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL FOR CS42L51 CODEC
標(biāo)準(zhǔn)包裝: 1
主要目的: 音頻編解碼器
嵌入式: 是,其它
已用 IC / 零件: CS42L51,CS8406,CS8415
主要屬性: 立體聲數(shù)字音頻發(fā)射器和接收器
次要屬性: 圖形用戶界面,S/PDIF 接口
已供物品: 板,CD
相關(guān)產(chǎn)品: CS42L51-DNZR-ND - IC CODEC STEREO W/HDPN AMP 32QFN
598-1627-ND - IC CODEC STEREO W/HDPN AMP 32QFN
CS42L51-CNZR-ND - IC CODEC LOW-V 24BIT 32-QFP
598-1045-ND - IC CODEC STEREO W/HDPN AMP 32QFN
其它名稱: 598-1005
DS679F1
33
CS42L51
4.3.8
Noise Gate
The noise gate may be used to mute signal levels that fall below a programmable threshold. This prevents
the ALC from applying gain to noise. A programmable delay may be used to set the minimum time before
the noise gate attacks the signal.
Maximum noise gate attenuation levels will depend on the gain applied in either the PGA or MIC pre-am-
plifier. For example: If both +32 dB pre-amplification and +12 dB programmable gain is applied, the max-
imum attenuation that the noise gate achieves will be 52 dB (-96 + 32 + 12) below full-scale.
Ramp-down time to the maximum setting is affected by the SOFTx bit.
Recommended settings: For best results, enable soft ramp for the digital attenuator. When the analog in-
puts are configured for differential signals (see “Differential Inputs” on page 29), enable the NG_ALL bit
to trigger the noise gate only when both inputs fall below the threshold.
Software
Controls:
-96
-40
THRESH[2:0]
Max
imum
A
tt
e
n
u
a
ti
o
n
*
-52 dB
Output
(dB)
Input (dB)
N
G
E
N
=1
N
G
E
N
=0
-80 dB
-64 dB
Figure 12. Noise Gate Attenuation
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB42L51/FAE 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk
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CDB42L55 功能描述:音頻 IC 開(kāi)發(fā)工具 Eval Bd Ultra Low PWR Stereo Codec RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
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