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參數(shù)資料
| 型號： | C9821GQ |
| 英文描述： | Up to 5A ULDO linear regulator |
| 中文描述： | 單時鐘驅(qū)動器| SSOP封裝| 24針|塑料 |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 121K |
| 代理商： | C9821GQ |
Direct Rambus
Plus Clock Generator
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07092 Rev. **
05/03/2001
Page 12 of 18
APPROVED PRODUCT
C9821
DC Parameters
Characteristic
Supply Voltage
Input (scalable CMOS)
Signal Low Voltage
Input (scalable CMOS)
Signal High Voltage
Refclk Input Low Voltage
Refclk Input High Voltage
Input Low Voltage
Input High Voltage
Input Supply Reference
Input Supply Reference for
PD inputs
Channel Impedance
Tri-State leakage Current
Current in Powerdown state
(PwrDnB=0)
Current in Clk Stop state
(stopB = 0)
Current in Normal state
(stopB = 1)
Reference Current in
Powerdown state
(PwrDnB=0)
Reference Current in
Normal or ClkStop state
(PwrDnB=1)
Symbol
Min
3.135
-
Typ
Max
3.465
0.3
Units
Conditions
V
DD
V
IL
-
-
V
Vdd
V
IH
0.7
-
-
Vdd
V
IL,R
V
IH,R
V
IL,PD
V
IH,PD
V
DDI,R,
V
DDI,PD
-
-
-
-
-
-
0.3
-
0.3
-
3.465
2.625
VddlR
VddlR
VddlPD
VddlPD
V
V
0.7
-
0.7
1.235
1.235
Z
CH
Ioz
28
ohms
uA
uA
50
200
Ipowerdown
Iclkstop
50
mA
Inormal
100
mA
Iref,pwdn
50
μ
A
Iref,norm
2
mA
=3.3V
±
5
%, TA = 0oC to +70oC
Note 1. DC bias = 0.9V, and V
AC
< 100mV
Table 10: Electrical Characteristics
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