參數(shù)資料
型號(hào)： C9630CY
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： XO, clock
英文描述： PC133 Clock Generator for SiS630/Pentium III & SiS540/Socket7 Applications
中文描述： 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝： SSOP-48
文件頁(yè)數(shù)： 13/18頁(yè)
文件大?。?/td> 185K
代理商： C9630CY
PC133 Clock Generator for SiS630/Pentium
III & SiS540/Socket7 Applications
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07035 Rev. **
05/02/2001
Page 13 of 18
APPROVED PRODUCT
C9630
AC Parameters
133 MHz Host
Min
7.45
1.87
1.67
0.4
-
-
7.46
1.87
1.67
0.4
-
-
29.93
12.0
12.0
0.5
-
-
20.8212
100 MHz Host
Min
9.98
3.0
2.8
0.4
-
-
9.89
3.0
2.63
0.4
-
-
29.94
12.0
12.0
0.5
-
-
20.8299
Symbol
Parameter
Max
8.0
-
-
1.9
175
250
8.0
-
-
1.69
500
250
-
-
-
2.9
500
500
20.8333
Max
10.5
-
-
2.1
175
250
10.5
-
-
1.88
500
250
-
-
-
2.9
500
500
20.8442
Units
Notes
TPeriod
THIGH
TLOW
Tr / Tf
TSKEW0
TCCJ
TPeriod
THIGH
TLOW
Tr / Tf
TSKEW1
TCCJ
TPeriod
THIGH
TLOW
Tr / Tf
TSKEW2
TCCJ
TPeriod
CPU(0:2) period
CPU(0:2) high time
CPU(0:2) low time
CPU(0:2) rise and fall times
Any CPU to Any CPU Skew time
CPU(0:2) Cycle to Cycle Jitter
SDRAM[0:13] period
SDRAM[0:13] high time
SDRAM[0:13] low time
SDRAM[0:13] rise and fall times
Any SDRAM to Any SDRAM
SDRAM[0:13] Cycle to Cycle Jitter
PCI(0:6) period
PCI(0:6) period
PCI(0:6) low time
PCI(0:6) rise and fall times
(Any PCI clock) to (Any PCI clock)
PCI(0:6) Cycle to Cycle Jitter
48MHz period ( conforms to
+167ppm max)
48MHz rise and fall times
48MHz Cycle to Cycle Jitter
24MHz period
24MHz rise and fall times
24 MHz Cycle to Cycle Jitter
REF(0:1) period
REF0 rise and fall times
REF1 rise and fall times
REF(0:1) Cycle to Cycle Jitter
Output enable delay (all outputs)
Output disable delay (all outputs)
All clock Stabilization from power-up
CPU to SDRAM (see fig.3, p.3)
nS
nS
nS
nS
pS
pS
nS
nS
nS
nS
pS
pS
nS
nS
nS
nS
pS
pS
nS
5, 6, 8
6,10
6, 11
6, 7
6, 8, 9
6,8,9,14
5, 6, 8
6,10
6, 11
6, 7
6, 8, 9
6,8,9,14
5, 6, 8
6,10
6, 11
6, 7
6, 8, 9
6, 8, 9
5, 6, 8
Tr / Tf
TCCJ
TPeriod
Tr / Tf
TCCJ
TPeriod
Tr / Tf
Tr / Tf
TCCJ
tpZL, tpZH
tpLZ, tpHZ
tstable
TSKEW3
1.0
-
4.0
500
1.0
-
4.0
500
nS
pS
nS
nS
pS
nS
nS
nS
pS
nS
nS
mS
pS
6, 7
6, 8, 9
5, 6, 8
6, 7
6, 8, 9
5, 6, 8
6, 7
6, 7
6, 8
13
13
12
5, 6, 8
41.6087
1.0
-
69.8167
1.0
1.0
-
1.0
1.0
41.6666
4.0
500
71.0
4.0
4.0
1000
10.0
10.0
3
340
41.6026
1.0
-
69.8017
1.0
1.0
-
1.0
1.0
41.6666
4.0
500
71.0
4.0
4.0
1000
10.0
10.0
3
354
0
0
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