參數(shù)資料
型號: C05M68HC05M
廠商: Motorola, Inc.
英文描述: HCMOS Microcontroller Unit
中文描述: HCMOS微控制器
文件頁數(shù): 72/130頁
文件大?。?/td> 1541K
代理商: C05M68HC05M
Capture/Compare Timer
Advance Information
MC68HC705P6A
Rev. 2.0
72
Capture/Compare Timer
MOTOROLA
8.4.4 Alternate Timer Registers
The alternate timer registers (ATRH and ATRL), shown in
Figure 8-5
,
contain the current high and low bytes of the 16-bit counter. Reading
ATRH before reading ATRL causes ATRL to be latched until ATRL is
read. Reading ATRL has no effect on the timer overflow flag (TOF).
Writing to the alternate timer registers has no effect.
NOTE:
To prevent interrupts from occurring between readings of ATRH and
ATRL, set the interrupt flag in the condition code register before reading
ATRH, and clear the flag after reading ATRL.
Address:
ATRH
$001A
Bit 7
6
5
4
3
2
1
Bit 0
Read:
ACRH7
ACRH6
ACRH5
ACRH4
ACRH3
ACRH2
ACRH1
ACRH0
Write:
Reset:
1
1
1
1
1
1
1
1
Address:
ATRL
$001B
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset:
1
1
1
1
1
1
0
0
= Unimplemented
Figure 8-5. Alternate Timer Registers (ATRH and ATRL)
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