參數(shù)資料
型號: C05M68HC05M
廠商: Motorola, Inc.
英文描述: HCMOS Microcontroller Unit
中文描述: HCMOS微控制器
文件頁數(shù): 20/130頁
文件大?。?/td> 1541K
代理商: C05M68HC05M
General Description
Advance Information
MC68HC705P6A
Rev. 2.0
20
General Description
MOTOROLA
available in either a 28-pin plastic dual in-line (PDIP) or a 28-pin small
outline integrated circuit (SOIC) package.
A functional block diagram of the MC68HC705P6A is shown in
Figure 1-1
.
1.3 Features
Features of the MC68HC705P6A include:
Low cost
M68HC05 core
28-pin SOIC, PDIP, or windowed DIP package
4672 bytes of user EPROM (including 48 bytes of page zero
EPROM and 16 bytes of user vectors)
239 bytes of bootloader ROM
176 bytes of on-chip RAM
4-channel 8-bit A/D converter
SIOP serial communications port
16-bit timer with output compare and input capture
20 bidirectional I/O lines and 1 input-only line
PC0 and PC1 high-current outputs
Single-chip, bootloader, and test modes
Power-saving stop, halt, and wait modes
Static EPROM mask option register (MOR) selectable options:
COP watchdog timer enable or disable
Edge-sensitive or edge- and level-sensitive external interrupt
SIOP most significant bit (MSB) or least significant bit (LSB)
first
SIOP clock rates: OSC divided by 8, 16, 32, or 64
Stop instruction mode, STOP or HALT
EPROM security external lockout
Programmable keyscan (pullups/interrupts) on PA0
PA7
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