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| 型號(hào)： | BX80532KC2800D |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 2800 MHz, MICROPROCESSOR |
| 文件頁(yè)數(shù)： | 118/129頁(yè) |
| 文件大?。?/td> | 1640K |
| 代理商： | BX80532KC2800D |
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Intel Xeon Processor with 512 KB L2 Cache
Datasheet
89
LINT[1:0]
I
LINT[1:0] (Local APIC Interrupt) must connect the appropriate pins of all front side
bus agents. When the APIC functionality is disabled, the LINT0 signal becomes
INTR, a maskable interrupt request signal, and LINT1 becomes NMI, a
nonmaskable interrupt. INTR and NMI are backward compatible with the signals of
those names on the Pentium processor. Both signals are asynchronous.
Both of these signals must be software configured via BIOS programming of the
APIC register space to be used either as NMI/INTR or LINT[1:0]. Because the APIC
is enabled by default after Reset, operation of these pins as LINT[1:0] is the default
configuration.
3
LOCK#
I/O
LOCK# indicates to the system that a transaction must occur atomically. This signal
must connect the appropriate pins of all processor front side bus agents. For a
locked sequence of transactions, LOCK# is asserted from the beginning of the first
transaction to the end of the last transaction.
When the priority agent asserts BPRI# to arbitrate for ownership of the processor
front side bus, it will wait until it observes LOCK# deasserted. This enables
symmetric agents to retain ownership of the processor front side bus throughout the
bus locked operation and ensure the atomicity of lock.
4
MCERR#
I/O
MCERR# (Machine Check Error) is asserted to indicate an unrecoverable error
without a bus protocol violation. It may be driven by all processor front side bus
agents.
MCERR# assertion conditions are configurable at a system level. Assertion options
are defined by the following options:
Enabled or disabled.
Asserted, if configured, for internal errors along with IERR#.
Asserted, if configured, by the request initiator of a bus transaction after it
observes an error.
Asserted by any bus agent when it observes an error in a bus transaction.
For more details regarding machine check architecture, refer to the IA-32 Software
Developer’s Manual, Volume 3: System Programming Guide
.
Since multiple agents may drive this signal at the same time, MCERR# is a wire-OR
signal which must connect the appropriate pins of all processor front side bus
agents. In order to avoid wire-OR glitches associated with simultaneous edge
transitions driven by multiple drivers, MCERR# is activated on specific clock edges
and sampled on specific clock edges.
ODTEN
I
ODTEN (On-die termination enable) should be connected to VCC to enable on-die
termination for end bus agents. For middle bus agents, pull this signal down via a
resistor to ground to disable on-die termination. Whenever ODTEN is high, on-die
termination will be active, regardless of other states of the bus.
PROCHOT#
O
PROCHOT# (processor hot) indicates that the processor Thermal Control Circuit
(TCC) has been activated. Under most conditions, PROCHOT# will go active when
the processor’s thermal sensor detects that the processor has reached its
maximum safe operating temperature. See Section 7.3 for more details.
These signals do not have on-die termination and must be terminated at the
end agent. See the appropriate Platform Design Guideline for additional
information.
Table 41. Signal Definitions (Page 6 of 10)
Name
Type
Description
Notes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BX80524R300128 | 32-BIT, 300 MHz, MICROPROCESSOR, XMA |
| BZV09/A0332/04 | 3A, 250VAC, FEMALE AND MALE, MAINS POWER CONNECTOR |
| BZV09/A0332/14 | 3A, 250VAC, FEMALE AND MALE, MAINS POWER CONNECTOR |
| BZV09/A0332/37 | 3A, 250VAC, FEMALE AND MALE, MAINS POWER CONNECTOR |
| BKT-146-01-F-V | 92 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BX80532KC2800DU | 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2.8GHZ - Boxed Product (Development Kits) |
| BX80532KC2800F | 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2.8GHZ - Boxed Product (Development Kits) |
| BX80532KC3000D | 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 3GHZ - Boxed Product (Development Kits) |
| BX80532KC3000H | 制造商:Intel 功能描述:MPU XEON NETBURST 64-BIT 0.13UM 3GHZ - Boxed Product (Development Kits) |
| BX80532KE2000D | 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2GHZ - Boxed Product (Development Kits) |
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