參數(shù)資料
型號(hào)： AT91SAM9XE256-CU
廠商： Atmel
文件頁數(shù)： 82/159頁
文件大?。?/td> 0K
描述： MCU ARM9 256K FLASH 217-BGA
產(chǎn)品培訓(xùn)模塊： MCU Product Line Introduction
標(biāo)準(zhǔn)包裝： 126
系列： SAM9XE
核心處理器： ARM9
芯體尺寸： 16/32-位
速度： 180MHz
連通性： EBI/EMI，以太網(wǎng)，I²C，MMC，SPI，SSC，UART/USART，USB
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 96
程序存儲(chǔ)器容量： 256KB（256K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 56K x 8
電壓 - 電源 (Vcc/Vdd)： 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 217-LFBGA
包裝： 托盤
配用： AT91SAM9XE-EK-ND - KIT EVAL FOR AT91SAM9XE
AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
2007 Microchip Technology Inc.
DS41213D-page 17
PIC16F5X
3.3
STATUS Register
This register contains the arithmetic status of the ALU,
the Reset status and the page preselect bits for
program memories larger than 512 words.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
Therefore, it is recommended that only BCF, BSF,
MOVWF
and SWAPF instructions be used to alter the
STATUS register because these instructions do not
affect the Z, DC or C bits from the STATUS register. For
other instructions which do affect Status bits, see
REGISTER 3-1:
STATUS REGISTER (ADDRESS: 03h)
R/W-0
R-1
R/W-x
PA2
PA1
PA0
TO
PD
ZDC
C
bit 7
bit 0
bit 7
PA2: Reserved, do not use
Use of the PA2 bit as a general purpose read/write bit is not recommended, since this may affect upward
compatibility with future products.
bit 6-5
PA<1:0>: Program Page Preselect bits (PIC16F57/PIC16F59)
00
= Page 0 (000h-1FFh)
01
= Page 1 (200h-3FFh)
10
= Page 2 (400h-5FFh)
11
= Page 3 (600h-7FFh)
Each page is 512 words. Using the PA<1:0> bits as general purpose read/write bits in devices which do
not use them for program page preselect is not recommended. This may affect upward compatibility with
future products.
bit 4
TO: Time-Out bit
1
= After power-up, CLRWDT instruction or SLEEP instruction
0
= A WDT time-out occurred
bit 3
PD: Power-Down bit
1
= After power-up or by the CLRWDT instruction
0
= By execution of the SLEEP instruction
bit 2
Z: Zero bit
1
= The result of an arithmetic or logic operation is zero
0
= The result of an arithmetic or logic operation is not zero
bit 1
DC: Digit Carry/Borrow bit (for ADDWF and SUBWF instructions)
ADDWF
1
= A carry to the 4th low order bit of the result occurred
0
= A carry from the 4th low order bit of the result did not occur
SUBWF
1
= A borrow to the 4th low order bit of the result did not occur
0
= A borrow from the 4th low order bit of the result occurred
bit 0
C: Carry/Borrow bit (for ADDWF, SUBWF and RRF, RLF instructions)
ADDWF
SUBWF
RRF or RLF
1
= A carry occurred
1
= A borrow did not occur
Loaded with LSb or MSb, respectively
0
= A carry did not occur
0
= A borrow occurred
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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