參數(shù)資料
型號： AT91SAM9XE256-CU
廠商： Atmel
文件頁數(shù)： 109/159頁
文件大?。?/td> 0K
描述： MCU ARM9 256K FLASH 217-BGA
產(chǎn)品培訓(xùn)模塊： MCU Product Line Introduction
標(biāo)準(zhǔn)包裝： 126
系列： SAM9XE
核心處理器： ARM9
芯體尺寸： 16/32-位
速度： 180MHz
連通性： EBI/EMI，以太網(wǎng)，I²C，MMC，SPI，SSC，UART/USART，USB
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 96
程序存儲器容量： 256KB（256K x 8）
程序存儲器類型： 閃存
RAM 容量： 56K x 8
電壓 - 電源 (Vcc/Vdd)： 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 217-LFBGA
包裝： 托盤
配用： AT91SAM9XE-EK-ND - KIT EVAL FOR AT91SAM9XE
AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
2007 Microchip Technology Inc.
DS41213D-page 41
PIC16F5X
9.0
INSTRUCTION SET SUMMARY
Each PIC16F5X instruction is a 12-bit word divided into
an opcode, which specifies the instruction type, and
one or more operands which further specify the opera-
tion of the instruction. The PIC16F5X instruction set
summary in Table 9-2 groups the instructions into byte-
oriented, bit-oriented, and literal and control opera-
tions. Table 9-1 shows the opcode field descriptions.
For byte-oriented instructions, ‘f’ represents a file
register designator and ‘d’ represents a destination
designator. The file register designator is used to
specify which one of the 32 file registers in that bank is
to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator which selects the number of the bit affected
by the operation, while ‘f’ represents the number of the
file in which the bit is located.
For literal and control operations, ‘k’ represents an
8- or 9-bit constant or literal value.
TABLE 9-1:
OPCODE FIELD
DESCRIPTIONS
All instructions are executed within one single instruc-
tion cycle, unless a conditional test is true or the
program counter is changed as a result of an instruc-
tion. In this case, the execution takes two instruction
cycles. One instruction cycle consists of four oscillator
periods. Thus, for an oscillator frequency of 4 MHz, the
normal instruction execution time would be 1
μs. If a
conditional test is true or the program counter is
changed as a result of an instruction, the instruction
execution time would be 2
μs.
Figure 9-1 shows the three general formats that the
instructions can have. All examples in the figure use
the following format to represent a hexadecimal
number:
0xhhh
where ‘h’ signifies a hexadecimal digit.
FIGURE 9-1:
GENERAL FORMAT FOR
INSTRUCTIONS
Field
Description
f
Register file address (0x00 to 0x1F)
W
Working register (accumulator)
b
Bit address within an 8-bit file register
k
Literal field, constant data or label
x
Don't care location (= 0 or 1)
The assembler will generate code with
x = 0. It is the recommended form of use
for compatibility with all Microchip
software tools.
d
Destination select;
d = 0 (store result in W)
d = 1 (store result in file register ‘f’)
Default is d = 1
label
Label name
TOS
Top-of-Stack
PC
Program Counter
WDT
Watchdog Timer Counter
TO
Time-out bit
PD
Power-down bit
dest
Destination, either the W register or the
specified register file location
[
]
Options
(
)
Contents
→
Assigned to
< >
Register bit field
∈
In the set of
italics
User defined term
Byte-oriented file register operations
11
6
5
4
0
d = 0 for destination W
OPCODE
d
f (FILE #)
d = 1 for destination f
f = 5-bit file register address
Bit-oriented file register operations
11
8 7
5 4
0
OPCODE
b (BIT #)
f (FILE #)
b = 3-bit bit address
f = 5-bit file register address
Literal and control operations (except GOTO)
11
8
7
0
OPCODE
k (literal)
k = 8-bit immediate value
Literal and control operations - GOTO instruction
11
9
8
0
OPCODE
k (literal)
k = 9-bit immediate value
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