參數(shù)資料
型號： AT89C51RB2-SLSUM
廠商： Atmel
文件頁數(shù)： 94/127頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 16K 44PLCC
產(chǎn)品培訓(xùn)模塊： MCU Product Line Introduction
標(biāo)準(zhǔn)包裝： 972
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 60MHz
連通性： SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 16KB（16K x 8）
程序存儲器類型： 閃存
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
配用： AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
AT89STK-11-ND - KIT STARTER FOR AT89C51RX2
69
AT89C51RB2/RC2
4180E–8051–10/06
drive the network. The Master may select each Slave device by software through port
pins (Figure 26). To prevent bus conflicts on the MISO line, only one slave should be
selected at a time by the Master for a transmission.
In a Master configuration, the SS line can be used in conjunction with the MODF flag in
the SPI Status register (SPSTA) to prevent multiple masters from driving MOSI and
SCK (see Error conditions).
A high level on the SS pin puts the MISO line of a Slave SPI in a high-impedance state.
The SS pin could be used as a general-purpose if the following conditions are met:
The device is configured as a Master and the SSDIS control bit in SPCON is set.
This kind of configuration can be found when only one Master is driving the network
and there is no way that the SS pin could be pulled low. Therefore, the MODF flag in
the SPSTA will never be set(1).
The Device is configured as a Slave with CPHA and SSDIS control bits set
(2). This
kind of configuration can happen when the system comprises one Master and one
Slave only. Therefore, the device should always be selected and there is no reason
that the Master uses the SS pin to select the communicating Slave device.
Note:
1. Clearing SSDIS control bit does not clear MODF.
2. Special care should be taken not to set SSDIS control bit when CPHA = ’0’ because
in this mode, the SS is used to start the transmission.
Baud Rate
In Master mode, the baud rate can be selected from a baud rate generator which is con-
trolled by three bits in the SPCON register: SPR2, SPR1 and SPR0.The Master clock is
selected from one of seven clock rates resulting from the division of the internal clock by
2, 4, 8, 16, 32, 64 or 128.
Table 54 gives the different clock rates selected by SPR2:SPR1:SPR0.
Table 54. SPI Master Baud Rate Selection
SPR2
SPR1
SPR0
Clock Rate
Baud Rate Divisor (BD)
00
0
F
CLK PERIPH /2
2
00
1
F
CLK PERIPH /4
4
01
0
F
CLK PERIPH/8
8
01
1
F
CLK PERIPH /16
16
10
0
F
CLK PERIPH /32
32
10
1
F
CLK PERIPH /64
64
11
0
F
CLK PERIPH /128
128
1
Don’t Use
No BRG
相關(guān)PDF資料
PDF描述
VJ1825A152JBLAT4X CAP CER 1500PF 630V 5% NP0 1825
VJ1825A152KBEAT4X CAP CER 1500PF 500V 10% NP0 1825
VE-B30-CU-B1 CONVERTER MOD DC/DC 5V 200W
ATMEGA644PA-PU IC MCU 8BIT 64KB FLASH 40DIP
VE-B2W-IY-F4 CONVERTER MOD DC/DC 5.5V 50W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT89C51RC 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash
AT89C51RC_05 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash
AT89C51RC_08 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash
AT89C51RC2 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 16K/ 32K Bytes Flash
AT89C51RC2_0312 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Microcontroller with 16K/32K Bytes Flash
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*