參數資料
型號： AT89C51RB2-SLSUM
廠商： Atmel
文件頁數： 45/127頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 16K 44PLCC
產品培訓模塊： MCU Product Line Introduction
標準包裝： 972
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 60MHz
連通性： SPI，UART/USART
外圍設備： POR，PWM，WDT
輸入/輸出數： 32
程序存儲器容量： 16KB（16K x 8）
程序存儲器類型： 閃存
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
配用： AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
AT89STK-11-ND - KIT STARTER FOR AT89C51RX2
24
AT89C51RB2/RC2
4180E–8051–10/06
Instructions that use indirect addressing access the Upper 128 Bytes of data RAM.
For example: MOV @R0, # data where R0 contains 0A0h, accesses the data Byte
at address 0A0h, rather than P2 (whose address is 0A0h).
The XRAM Bytes can be accessed by indirect addressing, with EXTRAM bit cleared
and MOVX instructions. This part of memory that is physically located on-chip,
logically occupies the first Bytes of external data memory. The bits XRS0 and XRS1
are used to hide a part of the available XRAM as explained in Table 18. This can be
useful if external peripherals are mapped at addresses already used by the internal
XRAM.
With EXTRAM = 0, the XRAM is indirectly addressed, using the MOVX instruction in
combination with any of the registers R0, R1 of the selected bank or DPTR. An
access to XRAM will not affect ports P0, P2, P3.6 (WR) and P3.7 (RD). For
example, with EXTRAM = 0, MOVX @R0, # data where R0 contains 0A0H,
accesses the XRAM at address 0A0H rather than external memory. An access to
external data memory locations higher than the accessible size of the XRAM will be
performed with the MOVX DPTR instructions in the same way as in the standard
80C51, with P0 and P2 as data/address busses, and P3.6 and P3.7 as write and
read timing signals. Accesses to XRAM above 0FFH can only be done by the use of
DPTR.
With EXTRAM = 1, MOVX @RI and MOVX @DPTR will be similar to the standard
80C51. MOVX @ Ri will provide an eight-bit address multiplexed with data on Port0
and any output port pins can be used to output higher order address bits. This is to
provide the external paging capability. MOVX @DPTR will generate a sixteen-bit
address. Port2 outputs the high-order eight address bits (the contents of DPH) while
Port0 multiplexes the low-order eight address bits (DPL) with data. MOVX @ RI and
MOVX @DPTR will generate either read or write signals on P3.6 (WR) and P3.7
(RD).
The stack pointer (SP) may be located anywhere in the 256 Bytes RAM (lower and
upper RAM) internal data memory. The stack may not be located in the XRAM.
The M0 bit allows to stretch the XRAM timings; if M0 is set, the read and write pulses
are extended from 6 to 30 clock periods. This is useful to access external slow
peripherals.
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參數描述
AT89C51RC 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash
AT89C51RC_05 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash
AT89C51RC_08 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 32K Bytes Flash
AT89C51RC2 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 16K/ 32K Bytes Flash
AT89C51RC2_0312 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Microcontroller with 16K/32K Bytes Flash
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