參數(shù)資料
型號： AT89C51RB2-SLSUM
廠商： Atmel
文件頁數(shù)： 57/127頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 16K 44PLCC
產(chǎn)品培訓模塊： MCU Product Line Introduction
標準包裝： 972
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 60MHz
連通性： SPI，UART/USART
外圍設備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 16KB（16K x 8）
程序存儲器類型： 閃存
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
配用： AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
AT89STK-11-ND - KIT STARTER FOR AT89C51RX2
35
AT89C51RB2/RC2
4180E–8051–10/06
Figure 12. PCA Interrupt System
PCA Modules: each one of the five compare/capture Modules has six possible func-
tions. It can perform:
16-bit Capture, positive-edge triggered
16-bit Capture, negative-edge triggered
16-bit Capture, both positive and negative-edge triggered
16-bit Software Timer
16-bit High-speed Output
8-bit Pulse Width Modulator
In addition, Module 4 can be used as a Watchdog Timer.
Each Module in the PCA has a special function register associated with it. These regis-
ters are: CCAPM0 for Module 0, CCAPM1 for Module 1, etc. (see Table 24). The
registers contain the bits that control the mode that each Module will operate in.
The ECCF bit (CCAPMn. 0 where n = 0, 1, 2, 3, or 4 depending on the Module)
enables the CCF flag in the CCON SFR to generate an interrupt when a match or
compare occurs in the associated Module.
PWM (CCAPMn. 1) enables the pulse width modulation mode.
The TOG bit (CCAPMn. 2) when set causes the CEX output associated with the
Module to toggle when there is a match between the PCA counter and the Module's
capture/compare register.
The match bit MAT (CCAPMn. 3) when set will cause the CCFn bit in the CCON
register to be set when there is a match between the PCA counter and the Module's
capture/compare register.
The next two bits CAPN (CCAPMn. 4) and CAPP (CCAPMn. 5) determine the edge
that a capture input will be active on. The CAPN bit enables the negative edge, and
the CAPP bit enables the positive edge. If both bits are set both edges will be
enabled and a capture will occur for either transition.
The last bit in the register ECOM (CCAPMn. 6) when set enables the comparator
function.
Table 24 shows the CCAPMn settings for the various PCA functions.
CF
CR
CCON
0xD8
CCF4 CCF3
CCF2
CCF1
CCF0
Module 4
Module 3
Module 2
Module 1
Module 0
ECF
PCA Timer/Counter
ECCFn CCAPMn. 0
CMOD. 0
IEN0. 6
IEN0. 7
To Interrupt
Priority Decoder
EC
EA
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