參數(shù)資料
型號: AT89C51ID2-SLSUM
廠商: Atmel
文件頁數(shù): 15/157頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 64K 44PLCC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 972
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
111
AT89C51ID2
4289C–8051–11/05
EEPROM Data
Memory
The 2K bytes on-chip EEPROM memory block is located at addresses 0000h to 07FFh
of the XRAM/ERAM memory space and is selected by setting control bits in the EECON
register.
A read or write access to the EEPROM memory is done with a MOVX instruction.
Write Data
Data is written by byte to the EEPROM memory block as for an external RAM memory.
The following procedure is used to write to the EEPROM memory:
Check EEBUSY flag
If the user application interrupts routines use XRAM memory space: Save and
disable interrupts.
Load DPTR with the address to write
Store A register with the data to be written
Set bit EEE of EECON register
Execute a MOVX @DPTR, A
Clear bit EEE of EECON register
Restore interrupts.
EEBUSY flag in EECON is then set by hardware to indicate that programming is in
progress and that the EEPROM segment is not available for reading or writing.
The end of programming is indicated by a hardware clear of the EEBUSY flag.
Figure 43 represents the optimal write sequence to the on-chip EEPROM data memory.
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