參數(shù)資料
型號: AT89C51ID2-SLSUM
廠商: Atmel
文件頁數(shù): 131/157頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 64K 44PLCC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 972
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
75
AT89C51ID2
4289C–8051–11/05
Registers
Table 58. PCON Register
PCON (S87:h) Power configuration Register
Reset Value= XXXX 0000b
76
543
210
--
-
POF
GF1
GF0
PD
IDL
Bit
Number
Bit
Mnemonic
Description
7-5
-
Reserved
The value read from these bits is indeterminate. Do not set these bits.
4POF
Power-Off Flag
Cleared to recognize next reset type.
Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set
by software.
3GF1
General Purpose flag 1
One use is to indicate whether an interrupt occurred during normal operation or
during Idle mode.
2GF0
General Purpose flag 0
One use is to indicate whether an interrupt occurred during normal operation or
during Idle mode.
1PD
Power-Down Mode bit
Cleared by hardware when an interrupt or reset occurs.
Set to activate the Power-Down mode.
If IDL and PD are both set, PD takes precedence.
0IDL
Idle Mode bit
Cleared by hardware when an interrupt or reset occurs.
Set to activate the Idle mode.
If IDL and PD are both set, PD takes precedence.
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