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| 型號： | AT32UC3A3-XPLD |
| 廠商： | Atmel |
| 文件頁數(shù)： | 82/94頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT DEV/EVAL FOR AT32UC3A3 |
| 產(chǎn)品培訓模塊： | AVR® UC3 Introduction Sensors Xplained |
| 標準包裝： | 1 |
| 系列： | AVR®32 UC3-A3 Xplained |
| 類型： | MCU |
| 適用于相關產(chǎn)品： | AT32UC3A3 |
| 所含物品： | 板 |
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83
32072SH–AVR32–10/2012
AT32UC3A3
SMBALERT bit may be set after reset
The SMBus Alert (SMBALERT) bit in the Status Register (SR) might be erroneously set after
system reset.
Fix/Workaround
After system reset, clear the SR.SMBALERT bit before commencing any TWI transfer.
10.2.13
TWIS
Clearing the NAK bit before the BTF bit is set locks up the TWI bus
When the TWIS is in transmit mode, clearing the NAK Received (NAK) bit of the Status Reg-
ister (SR) before the end of the Acknowledge/Not Acknowledge cycle will cause the TWIS to
attempt to continue transmitting data, thus locking up the bus.
Fix/Workaround
Clear SR.NAK only after the Byte Transfer Finished (BTF) bit of the same register has been
set.
TWIS stretch on Address match error
When the TWIS stretches TWCK due to a slave address match, it also holds TWD low for
the same duration if it is to be receiving data. When TWIS releases TWCK, it releases TWD
at the same time. This can cause a TWI timing violation.
Fix/Workaround
None.
10.2.14
MCI
MCI_CLK features is not available on PX12, PX13 and PX40
Fix/Workaround
MCI_CLK feature is available on PA27 only.
The busy signal of the responses R1b is not taken in account for CMD12
STOP_TRANSFER
It is not possible to know the busy status of the card during the response (R1b) for the com-
mands CMD12.
Fix/Workaround
The card busy line should be polled through the GPIO Input Value register (IVR) for com-
mands CMD12.
10.2.15
SSC
Frame Synchro and Frame Synchro Data are delayed by one clock cycle
The frame synchro and the frame synchro data are delayed from 1 SSC_CLOCK when:
- Clock is CKDIV
- The START is selected on either a frame synchro edge or a level
- Frame synchro data is enabled
- Transmit clock is gated on output (through CKO field)
Fix/Workaround
Transmit or receive CLOCK must not be gated (by the mean of CKO field) when START
condition is performed on a generated frame synchro.
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT32UC3A4128 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:32-bit AVR? Microcontroller |
| AT32UC3A4128-C1UR | 功能描述:32位微控制器 - MCU 128k flash Ind RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| AT32UC3A4128-C1UT | 功能描述:32位微控制器 - MCU 128k flash Ind RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| AT32UC3A4128HBZ-C1UR | 制造商:Atmel Corporation 功能描述:128K FLASH 100 BALL TBGA REEL INDUSTRIAL - Tape and Reel |
| AT32UC3A4128S | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:32-bit AVR? Microcontroller |
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