參數(shù)資料
型號： AT32UC3A3-XPLD
廠商： Atmel
文件頁數(shù)： 44/94頁
文件大?。?/td> 0K
描述： KIT DEV/EVAL FOR AT32UC3A3
產(chǎn)品培訓(xùn)模塊： AVR® UC3 Introduction
Sensors Xplained
標(biāo)準(zhǔn)包裝： 1
系列： AVR®32 UC3-A3 Xplained
類型： MCU
適用于相關(guān)產(chǎn)品： AT32UC3A3
所含物品： 板
49
32072SH–AVR32–10/2012
AT32UC3A3
7.6.1
Power Consumtion for Different Sleep Modes
Notes:
1. Core frequency is generated from XIN0 using the PLL.
Table 7-12.
Power Consumption for Different Sleep Modes
Mode
Conditions(1)
Typ.
Unit
Active
- CPU running a recursive Fibonacci Algorithm from flash and clocked from PLL0
at f MHz.
- Flash High Speed mode disable (f < 66 MHz)
- Voltage regulator is on.
- XIN0: external clock. Xin1 Stopped. XIN32 stopped.
- All peripheral clocks activated with a division by 8.
- GPIOs are inactive with internal pull-up, JTAG unconnected with external
pullup and Input pins are connected to GND
0.626xf(MHz)+2.257
mA/MHz
Same conditions with Flash High Speed mode enable (66< f < 84 MHz)
0.670xf(MHz)+2.257
mA/MHz
Same conditions with Flash High Speed mode disable at 60 MHz
40
mA
Idle
See Active mode conditions
0.349xf(MHz)+0.968
mA/MHz
Same conditions at 60 MHz
21.8
mA
Frozen
See Active mode conditions
0.098xf(MHz)+1.012
mA/MHz
Same conditions at 60 MHz
6.6
mA
Standby
See Active mode conditions
0.066xf(MHz)+1.010
mA/MHz
Same conditions at 60 MHz
4.6
mA
Stop
- CPU running in sleep mode
- XIN0, Xin1 and XIN32 are stopped.
- All peripheral clocks are desactived.
- GPIOs are inactive with internal pull-up, JTAG unconnected with external
pullup and Input pins are connected to GND.
96
A
Deepstop
See Stop mode conditions
54
A
Static
T
A = 25 °C
CPU is in static mode
GPIOs on internal pull-up
All peripheral clocks de-activated
DM and DP pins connected to ground
XIN0, Xin1 and XIN32 are stopped
on Amp0
31
A
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