- 您現(xiàn)在的位置：買賣IC網 > PDF目錄375361 > ASDP-21365KBC-1AA (ANALOG DEVICES INC) SHARC Processor PDF資料下載
參數(shù)資料
| 型號： | ASDP-21365KBC-1AA |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | SHARC Processor |
| 中文描述： | 16-BIT, 55.55 MHz, OTHER DSP, PBGA136 |
| 封裝： | MO-205AE, BGA-136 |
| 文件頁數(shù)： | 29/52頁 |
| 文件大?。?/td> | 1320K |
| 代理商： | ASDP-21365KBC-1AA |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁當前第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
Rev. A
|
Page 29 of 52
|
December 2006
Memory Write—Parallel Port
Use these specifications for asynchronous interfacing to memo-
ries (and memory-mapped peripherals) when the
ADSP-2136x is accessing external memory space.
Table 24. 8-Bit Memory Write Cycle
Parameter
Switching Characteristics
t
ALEW
t
ADAS
1
t
ALERW
t
RWALE
t
WRH
t
ADAH
1
t
WW
t
ADWL
t
ADWH
t
DWS
t
DWH
t
DAWH
D = (data cycle duration = the value set by the PPDUR Bits (5–1) in the PPCTL register)
×
t
PCLK
.
H = t
PCLK
(if a hold cycle is specified, else H = 0)
F = 7
×
t
PCLK
(if FLASH_MODE is set, else F = 0). If FLASH_MODE is set, D must be
≥
9
×
t
PCLK
.
t
PCLK
= (peripheral) clock period = 2
×
t
CCLK
Min
Max
Unit
ALE Pulse Width
AD15–0 Address Setup Before ALE Deasserted
ALE Deasserted to Write Asserted
Write Deasserted to ALE Asserted
Delay Between WR Rising Edge to Next WR Falling Edge
AD15–0 Address Hold After ALE Deasserted
WR Pulse Width
AD15–8 Address to WR Low
AD15–8 Address Hold After WR High
AD7–0 Data Setup Before WR High
AD7–0 Data Hold After WR High
AD15–8 Address to WR High
2 × t
PCLK
– 2.0
t
PCLK
– 2.8
2 × t
PCLK
– 3.8
H + 0.5
F + H + t
PCLK
– 2.3
t
PCLK
– 0.5
D – F – 2.0
t
PCLK
– 2.8
H
D – F + t
PCLK
– 4.0
H
D – F + t
PCLK
– 4.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
On reset, ALE is an active high cycle. However, it can be configured by software to be active low.
Figure 20. Write Cycle for 8-Bit Memory Timing
AD15
-
8
VALID
ADDRESS
VALID ADDRESS
t
ADAS
AD7
-
0
ALE
RD
WR
t
ADAH
t
ADWH
t
ADWL
VALID DATA
t
DAWH
t
WRH
t
RWALE
VALID
ADDRESS
VALID DATA
t
ALEW
t
ALERW
t
WW
t
DWS
t
DWH
VALID ADDRESS
NOTE: MEMORY WRITES ALWAYS OCCUR IN GROUPS OF FOUR
BETWEEN ALE CYCLES. THIS FIGURE ONLY SHOWS TWO MEMORY
WRITES IN ORDER TO PROVIDE THE NECESSARY TIMING INFORMATION.
相關PDF資料 |
PDF描述 |
|---|---|
| ASDP-21365KBCZ-1AA | SHARC Processor |
| ASDP-21365WBBCZ-1A | SHARC Processor |
| ASG509A | CMOS 4/8 CHAANNEL ANALOG MULTIPLEXERS |
| ASI-DDC4563-24 | SILICON DETECTOR DIODE |
| ASI-MA40232-119 | SILICON DETECTOR DIODE |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ASDP-21365KBCZ-1AA | 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor |
| ASDP-21365WBBCZ-1A | 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor |
| ASD-PL2F | 制造商:GAMEWELL-FCI 制造商全稱:GAMEWELL-FCI 功能描述:Analog, addressable photoelectronic smoke sensor |
| ASD-PTL2F | 制造商:GAMEWELL-FCI 制造商全稱:GAMEWELL-FCI 功能描述:Analog, addressable photoelectronic smoke sensor |
| ASDU250D | 制造商:AF 功能描述:DUSTER 152A INVERTIBLE SPRAYDUSTER 制造商:AF 功能描述:DUSTER, 152A INVERTIBLE SPRAYDUSTER |
發(fā)布緊急采購，3分鐘左右您將得到回復。