參數(shù)資料
型號: AS3517-T
廠商: ams
文件頁數(shù): 49/94頁
文件大?。?/td> 0K
描述: IC CODEC AFE AUDIO STER 81-CTBGA
標(biāo)準包裝: 2,000
類型: 音頻編解碼器
應(yīng)用: 便攜式音頻,電話
安裝類型: 表面貼裝
封裝/外殼: 81-TFBGA
供應(yīng)商設(shè)備封裝: 81-CTBGA(9x9)
包裝: 帶卷 (TR)
AS3517 V17
Data Sheet, Confidential
2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
9.3.5
Real Time Clock
General
The real time clock block is an independent block, which is still working even when the chip is shut down. The only condition for this
operation is that BVDDR has a voltage of above 1.0V. The block uses a standard 32kHz crystal that is connected to a low power
oscillator. The total power consumption is typ. 12A. (Q32k clock buffer not operating)
The RTC seconds counter is 32bit wide and can be programmed via the 2-wire serial interface. The RTC can deliver a seconds or minutes
interrupt.
Another 23bit wide counter allows auto wake-up (max. after 96 days). This counter is internally connected to the power-up and hibernation
control block.
The RTC voltage regulator (RVDD) further supplies a 128bit SRAM. It can be used to store settings or data before shutdown.
Clock adjustment
The RTC clock is adjustable in steps of 7.6ppm which allows the use of inexpensive 32kHz crystals. The nominal frequency shall be
32.768Hz. This frequency is divided down to 0.25Hz:
f = 32.768 / (4*32*1024)
At the input of this divider one can add corrective counts, which allow to correct an inaccurate crystal in a range from –64 counts (=-
488ppm) to +63 counts (=+480ppm):
fcorrected = fcrystal / [(4*32*1024)-64+RTC_TBC]
Register Description
Table 41 RTC Related Register
Name
Base
Offset
Description
RTCV
2-wire serial
28h
RTC oscillator and counter enable
RTCT
2-wire serial
29h
RTC interrupt and time correction settings
RTC_0 to RTC_3
2-wire serial
2Ah to 2Dh
RTC time-base seconds registers
RTC_WakeUp
2-wire serial
19h
RTC wake-up settings and SDRAM access
IRQ_ENRD_2
2-wire serial
25h
Interrupt settings for RVDD under-voltage detection
IRQ_ENRD_4
2-wire serial
27h
Interrupt settings for getting a second or minute interrupt
Revision 1v3
52
- 93
ams
AG
Technical
content
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