
Debug Interface
ARM7TDMI Data Sheet
ARM DDI 0029E
8-13
O
8.9.2 ARM7TDMI device identification (ID) code register
Purpose:
Reads the 32-bit device identification code. No
programmable supplementary identification code is provided.
Length:
32 bits. The format of the ID register is as follows:
Please contact your supplier for the correct Device Identification Code.
Operating mode:
When the IDCODE instruction is current, the ID register is selected as the serial path
between
TDI
and
TDO
.
There is no parallel output from the ID register.
The 32-bit device identification code is loaded into the ID register from its parallel
inputs during the CAPTURE-DR state.
8.9.3 Instruction register
Purpose:
Changes the current TAP instruction.
Length:
4 bits
Operating mode:
When in the SHIFT-IR state, the instruction register is
selected as the serial path between
TDI
and
TDO
.
During the CAPTURE-IR state, the value 0001 binary is loaded into this register. This
is shifted out during SHIFT-IR (lsb first), while a new instruction is shifted in (lsb first).
During the UPDATE-IR state, the value in the instruction register becomes the current
instruction. On reset, IDCODE becomes the current instruction.
8.9.4 Scan chain select register
Purpose:
Changes the current active scan chain.
Length:
4 bits
Operating mode:
After SCAN_N has been selected as the current instruction,
when in the SHIFT-DR state, the Scan Chain Select Register
is selected as the serial path between
TDI
and
TDO
.
During the CAPTURE-DR state, the value 1000 binary is loaded into this register. This
is shifted out during SHIFT-DR (lsb first), while a new value is shifted in (lsb first).
During the UPDATE-DR state, the value in the register selects a scan chain to become
the currently active scan chain. All further instructions such as INTEST then apply to
that scan chain.
0
1
11
12
27
28
31
1
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