參數(shù)資料
型號(hào): AN1218
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: HC05 to HC08 Optimization
中文描述: 以HC08的優(yōu)化HC05
文件頁(yè)數(shù): 24/56頁(yè)
文件大?。?/td> 417K
代理商: AN1218
Application Note
AN1218 Rev. 2
24
DBNZX
Decrement and Branch if Not Zero
X
(X) - $01; PC
(PC) + $0002 + Rel, if
result _ $00
Operation:
Description: DBNZX subtracts one from the lower index
register and causes a branch if the result is
not zero. This instruction combines DECX
and BNE for faster loop counter control.
Code Example
The use of these new instructions can cut cycle time in looping or
counting routines. Compare and branch routines can be used to search
for specific values in tables or variable locations. Decrement and branch
routines can be used for keeping count in loops.
The following piece of code shows how the compare and branch
instruction searches a table for a match. As an example, let's say that
you recently read in a table of 80 A/D data bytes. You would like to know
if the signal was saturated above the rails of the A/D converter. You
would then search the table for the value $FF. If found, your code would
branch out and execute some control algorithm to attenuate the analog
signal. Refer to
Appendix H — CPU05 and CPU08 Search Code
for a
comparison of CPU05 and CPU08 code.
Mathematical Operations
V Bit, DIV, DAA,
and the NSA
Instruction
New features and instructions added to the CPU08 have made some
mathematical computations easier. The V bit is added to the CCR to
support signed arithmetic. CPU08 has the capability of 16-bit division.
The DIV instruction will divide a 16-bit dividend by an 8-bit divisor. For
binary coded decimal operations, the CPU08 has a decimal adjust
accumulator, DAA, instruction and a nibble swap accumulator, NSA,
instruction.
Signed Math and
Signed Branches
The V bit in the CCR adds greater programming flexibility to the user.
The addition of two's complement comparisons can aid in the branching
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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