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參數(shù)資料
| 型號(hào)： | AN1218 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | HC05 to HC08 Optimization |
| 中文描述： | 以HC08的優(yōu)化HC05 |
| 文件頁數(shù)： | 15/56頁 |
| 文件大?。?/td> | 417K |
| 代理商： | AN1218 |
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Application Note
Stack Pointer
AN1218 Rev. 2
15
index register H:X points to the last value
that was stored on the stack.
TXS
Transfer Index Register to Stack Pointer
SP
←
(H:X) - $0001
Description: Loads the stack pointer SP with the
contents of the index register H:X minus
one. The contents of the index register H:X
remain unchanged.
Operation:
Software
Techniques Using
the SP
The CPU05 and the CPU08 use the stack for two primary purposes.
First, every time the CPU executes an interrupt service routine, the
register contents are saved on the stack. After the execution of a return
from interrupt (RTI) instruction, the register contents on the stack are
restored to the CPU. Second, every time a jump to subroutine (JSR) or
a branch to subroutine (BSR) occurs, the return address is saved on the
stack. Theaddressisrestoredtotheprogramcounterafterareturnfrom
subroutine (RTS) instruction is executed.
The CPU08 with its new stack manipulation instructions allows the user
topassparameterstothesubroutineandstorelocalortemporaryvalues
within the subroutine. Two major benefits are derived from using the
stack for parameters and temporary values:
1.
A subroutine will allocate RAM storage for its variables and
release this memory when the subroutine is finished. Therefore,
global variables are not needed for these routines. This saves
RAM memory space.
2.
The allocation of new local variables for each subroutine makes
the subroutine recursive and reentrant. This allows the
programmer to easily modularize his code.
Let's look at the stacking operation of the CPU05 and the CPU08. The
stack is located in RAM. Since stacking occurs from high memory to low
memory, the SP usually points to the highest RAM memory address.
Both the CPU05 and the CPU08 reset the SP at $00FF. The CPU08
instruction set allows the programmer to move the stack out of Page 0
memory if needed.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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