參數(shù)資料
        型號(hào): AM79Q021JC
        廠商: ADVANCED MICRO DEVICES INC
        元件分類(lèi): 編解碼器
        英文描述: PCM CODEC, PQCC44
        封裝: PLASTIC, LCC-44
        文件頁(yè)數(shù): 4/64頁(yè)
        文件大?。?/td> 911K
        代理商: AM79Q021JC
        12
        Am79Q02/021/031 Data Sheet
        ELECTRICAL CHARACTERISTICS
        Typical values are for TA = 25°C and nominal supply voltages. Minimum and maximum values are over the
        temperature and supply voltage ranges shown in Operating Ranges.
        Notes:
        1. The CD1, CD2, C3–C5 outputs are resistive for less than a 0.8 V drop. Total current must not exceed absolute maximum ratings.
        2. When the digitizer saturates, a resistor of 50 k
        ±20 k is connected either to DGND or to VCCD — (1 diode drop) as
        appropriate to discharge the coupling capacitor.
        3. When the QSLAC device is in the Inactive state, the analog output will present either a VREF DC output level through a 15 k
        resistor (VMODE = 0) or a high impedance (VMODE = 1).
        4. If there is an external DC path from VOUT to VIN with a gain of GDC and the AISN has a gain of hAISN, then the output offset
        will be multiplied by 1/[1–(hAISN GDC)].
        5. Power dissipation in the Inactive state is measured with all digital inputs at VIH = VCC and VIL = DGND and with no load
        connected to VOUT1, VOUT2, VOUT3, or VOUT4.
        Symbol
        Parameter Descriptions
        Min
        Typ
        Max
        Unit
        VIL
        Input Low voltage
        0.8
        V
        VIH
        Input High voltage
        2.0
        IIL
        Input leakage current
        –10
        +10
        A
        VOL
        Output Low voltage
        CD1–C5 (IOL = 4 mA)
        CD1–C5 (IOL = 8 mA) (Note 1)
        TSCA, TSCB (IOL =14 mA)
        Other digital outputs (IOL = 2 mA)
        0.4
        0.8
        0.4
        V
        VOH
        Output High voltage
        CD1–C5 (IOH = 4 mA)
        CD1–C5 (IOH = 8 mA) (Note 1)
        Other digital outputs (IOH = 400 A)
        VCCD – 0.4 V
        VCCD – 0.8 V
        2.4
        IOL
        Output leakage current (HI = Z state)
        –10
        10
        A
        VIR
        Analog input voltage range(AX = 0 dB)
        (Relative to VREF)(AX = 6.02 dB)
        ±1.584
        ±0.792
        Vpk
        VIOS
        Offset voltage allowed on VIN
        –50
        50
        mV
        ZIN
        Analog input impedance to VREF300 to 3400 Hz
        0.43
        3.4
        M
        IIP
        Current into analog input for input voltages between
        3.8 V and 5.0 V (Note 2)
        54
        170
        A
        IIN
        Current out of analog input for input voltages between
        0 V and 0.5 V (Note 2)
        50
        170
        ZOUT
        VOUT output impedance
        1
        10
        IOUT
        VOUT output current (F< 3400 Hz) (Note 3)
        –4
        4
        mA
        ZREF
        VREF output impedance (F < 3400 Hz)
        70
        130
        k
        VOR
        VOUT voltage range(AR = 0 dB)
        (Relative to VREF)(AR = 6.02 dB)
        ±1.584
        ±0.792
        Vpk
        VOOS
        VOUT offset voltage (AISN off)
        –40
        40
        mV
        VOOSA
        VOUT offset voltage (AISN on) (Note 4)
        –80
        80
        LINAISN
        Linearity of AISN circuitry (input = 0 dBm0)
        –0.25
        0.25
        LSB
        PD
        Power dissipation
        All channels active
        1 channel active
        All channels inactive, (in normal state)
        All channels inactive (in low power state, see Note 5)
        200
        70
        18
        6
        260
        130
        25
        12
        mW
        CI
        Input capacitance (Digital)
        15
        pF
        CO
        Output capacitance (Digital)
        15
        PSRR
        Power supply rejection ratio (1.02 kHz, 100 mVRMS, either
        path, GX = GR = 0 dB)
        40
        dB
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