參數(shù)資料
型號(hào)： AM79Q021JC
廠商： ADVANCED MICRO DEVICES INC
元件分類： 編解碼器
英文描述： PCM CODEC, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 38/64頁
文件大?。?/td> 911K
代理商： AM79Q021JC
SLAC Products
43
16, 17. Read Real-Time Data Register
MPI Command
(4D/4Fh)
C = 0: Do not clear interrupt
C = 1: Clear interrupt
This register writes/reads real-time data with or without clearing the interrupt.
Real Time Data
CDA1
Debounced data bit 1 on Channel 1
CDB1
Data bit 2 or multiplexed data bit 1 on Channel 1
CDA2
Debounced data bit 1 on Channel 2
CDB2
Data bit 2 or multiplexed data bit 1 on Channel 2
CDA3
Debounced data bit 1 on Channel 3
CDB3
Data bit 2 or multiplexed data bit 1 on Channel 3
CDA4
Debounced data bit 1 on Channel 4
CDB4
Data bit 2 or multiplexed data bit 1 on Channel 4
This command does not depend on the state of the Channel Enable Register.
18, 19. Write/Read AISN and Analog Gains
MPI Command
(50/51h)
R/W = 0: Write
R/W = 1: Read
RSVD
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
Transmit Analog Gain
AX = 0*
0 dB gain
AX = 1
6.02 dB gain
Receive Analog Loss
AR = 0*
0 dB loss
AR = 1
6.02 dB loss
AISN coefficient
AISN = 0* – 31
See below (Default value = 0)
The Impedance Scaling Network (AISN) gain can be varied from –0.9375 to 0.9375
in multiples of 0.0625. The gain coefficient is decoded using the following equation:
where hAISN is the gain of the AISN. A value of AISN = 10000 turns on the Full Digital
Loopback mode and a value of AISN = 0000* indicates a gain of 0 (cutoff).
* Power Up and Hardware Reset (RST) Value = 00h.
D7
D6
D5
D4
D3
D2
D1
D0
Command
0
1
0
1
C
1
Output Data
CDB4
CDA4
CDB3
CDA3
CDB2
CDA2
CDB1
CDA1
D7
D6
D5
D4
D3
D2
D1
D0
Command
0
1
0
1
0
R/W
I/O Data
RSVD
AX
AR
AISN4
AISN3
AISN2
AISN1
AISN0
h
AISN
0.0625
=
16
AISN4
8
AISN3
4
AISN2
2
AISN1
AISN0
+
+
+
+
() 16
–
[]
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