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參數(shù)資料
| 型號： | AM79Q021JC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 編解碼器 |
| 英文描述： | PCM CODEC, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 14/64頁 |
| 文件大?。?/td> | 911K |
| 代理商： | AM79Q021JC |
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SLAC Products
21
Master Clock
Auxiliary Output Clocks
Notes:
1. If CFAIL = 1 (Command 23), GX, GR, Z, B1, X, R, and B2 coefficients must not be written or read without first deactivating
all channels or switching them to default coefficients; otherwise, a chip select off time of 25
s is required. If the low power
state (LPM = 1, Command 14) is selected and MCLK is also lost, this minimum chip select off time increases to 75
s.
2. The first data bit is enabled on the falling edge of CS or on the falling edge of DCLK, whichever occurs last.
3. The PCM clock frequency must be an integer multiple of the frame sync frequency. The maximum allowable PCM clock
frequency is 8.192 MHz. The actual PCM clock rate is dependent on the number of channels allocated within a frame. The
minimum clock frequency is 128 kHz in Companded state and 256 kHz in Linear state, PCM Signaling state, or double PCLK
state. The minimum PCM clock rates should be doubled for parts with only one PCM highway in order to allow simultaneous
access to all four channels.
4. TSC is delayed from FS by a typical value of N tPCY , where N is the value stored in the time/clock-slot register.
5. tTSO is defined as the time at which the output achieves the Open Circuit state.
6. There is a special conflict detection circuitry that will prevent high-power dissipation from occurring when the DXA or DXB
pins of two QSLAC devices are tied together and one QSLAC device starts to transmit before the other has gone into a
High-impedance state.
SWITCHING WAVEFORMS
Input and Output Waveforms for AC Tests
Master Clock Timing
No.
Symbol
Parameter
Min
Typ
Max
Units
37
AMCY
Master clock accuracy
–100
+100
ppM
38
tMCR
Rise time of clock
15
ns
39
tMCF
Fall time of clock
15
40
tMCH
MCLK High pulse width
48
41
tMCL
MCLK Low pulse width
48
No.
Symbol
Parameter
Min
Typ
Max
Units
42
fCHP
Chopper clock frequency
CHP = 0
CHP = 1
256
292.57
kHz
43
fE1
E1 output frequency (CMODE = EE1 = 1)
4.923
44
tE1
E1 pulse width (CMODE = EE1 = 1)
31.25
s
Test
Points
2.0
0.8
2.0
0.8
2.4
0.45
19256A-015
37
38
41
40
39
19256A-016
VIH
VIL
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79Q021JC/T | 制造商:Advanced Micro Devices 功能描述: |
| AM79Q021VC | 制造商:Advanced Micro Devices 功能描述: |
| AM79Q02JC | 制造商:Advanced Micro Devices 功能描述: |
| AM79Q031 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad Subscriber Line Audio-Processing Circuit (QSLAC) Devices |
| AM79Q031JC | 制造商:Advanced Micro Devices 功能描述: |
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