
8/01/00
Am79C976
145
P R E L I M I N A R Y
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Offset 1A0h
This register is used to control and indirectly access the
Memory Built-in Self-Test (MBIST) logic that automati-
cally tests the external SSRAM.
The contents of this register are cleared to 0 when the
RST pin is asserted. The register is not cleared at the
start of a serial EEPROM read operation or after a se-
rial EEPROM read error.
Table 51. DATAMBIST: Memory Built-in Self-Test Access Register
02h
PCnet-PCI controller
1
32-bit software structures,
non-burst or burst access
32-bit software structures, non-
burst access only
03h
PCnet-PCI
controller
1
32-bit software structures,
non-burst or burst access
32-bit software structures, non-
burst or burst access
04h
VLAN
1
Not used
32-bit software structures, non-
burst or burst access
05h
64-bit address
1
Not used
32-bit software structures, 32-
byte descriptors, non-burst or
burst access
All Other
Reserved
Undefined
Undefined
Undefined
SWSTYLE
[7:0]
Style
Name
SSIZE32
Initialization Block Entries
Descriptor Ring Entries
Bit
Name
Description
63
DM_DONE
MBIST done indicator. This bit is set to 1 when the automatic memory test has stopped, either
because the test has completed or because an error was detected. It is cleared to 0 when either
DM_START or DM_RESUME is set.
This bit is read-only.
62
DM_ERROR
MBIST error indicator. This bit is set to 1 when the memory test logic has detected a memory error.
It is cleared to 0 when either DM_START or DM_RESUME is set.
This bit is read-only.
61
DM_START
MBIST Start. Setting this bit to 1 resets the MBIST logic, including the DM_ERROR and
DM_TEST_FAIL bits, and starts the memory test process. DM_START should not be set at the
same time that the DM_RESUME bit is set.
DM_START is automatically cleared when the memory test stops. This bit is read/write.
60
DM_RESUME
MBIST Resume. Setting this bit to 1 restarts the memory test sequence at the point where it last
stopped. Setting this bit clears the DM_ERROR bit, but it does not clear the DM_TEST_FAIL bit.
This bit should not be set at the same time that the DM_START bit is set.
DM_RESUME is automatically cleared when the memory test stops. This bit is read/write.
59
DM_FAIL_STOP
MBIST Stop on Failure Control. When this bit is set to 1, the memory test will stop each time an
error is detected. When this bit is cleared to 0, the memory test will run to completion, regardless
of the number of errors that are detected.
This bit is read/write.
58
DM_TEST_FAIL
MBIST Test Failure Indicator. This bit is set when a memory test error is detected. It is reset when
DM_START is set to 1. It is not cleared when DM_RESUME is set to 1.
This bit is read-only.
57
RES
Reserved. Written as 0, read as undefined.