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參數(shù)資料
| 型號： | Am7968-175LKC |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| 中文描述： | TAXIchip集成電路（透明異步Xmitter，接收器接口） |
| 文件頁數(shù)： | 56/127頁 |
| 文件大?。?/td> | 730K |
| 代理商： | AM7968-175LKC |
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AMD
52
TAXIchip Integrated Circuits Technical Manual
1.2 T he Am7969 T AX I Rec eiver
The TAXI Receiver (Figure 1-2) accepts the encoded data stream into a serial-to-paral-
lel converter, decodes and outputs the received data with an accompanying strobe. An
on-chip data tracking PLL performs the necessary clock recovery from the input serial
data stream.
2.0 US ING T HE T AX Ic hip S ET
The current TAXlchip set has a maximum effective data throughput of 140 Mbps, over
ten times faster than the data rate of conventional RS-422 drivers and receivers. The
TAXlchip set has a frequency range of 40 MHz to 175 MHz corresponding to a parallel
data transfer rate of 4 to 17.5 Mbyte/sec. Data rates of less than 4 Mbyte/sec are
accommodated by the automatic insertion of Sync symbols in the absence of new data
or commands.
The TAXI Transmitter accepts parallel input data with a simple Strobe/Acknowledge
handshake, while the Receiver asserts an output strobe when data is available at its
parallel outputs. The high speed serial-to-parallel conversions and data encoding/de-
coding are transparent to the user, who sees only an effective parallel transfer rate of up
to 17.5 Mbyte/sec (see Figure 2-1). Appendix C, TAXI TIP # 89-07 addresses the use of
synchronous and asynchronous strobes.
It is important to note here that the user is not forced to supply data at the maximum
byte rate equivalent of the serial data rate. Data or Commands are sent down the serial
link only when the user strobes the Transmitter. For those byte clock cycles when the
Transmitter is not strobed, it automatically sends a special Syncsymbol down the link.
The Sync symbol is a unique bit pattern which cannot be confused with any other valid
pattern.
For this reason, Sync is used to establish byte framing at the Receiver. See Appendix C,
TAXI TIP # 89-03 proper use of TAXI Sync. It also keeps the link active when no other
symbols are being sent, maintaining Receiver PLL lock. Sync will not over-write data
already present in the receiver’s output data latch. The serial rate is, therefore, truly
transparent to the user; at input data rates less than the equivalent serial bit rate, the
TAXI Transmitter will fill the gaps with Syncs, which do not disturb Receiver output data.
2.1 Data and Command
The Am7968 TAXI Transmitter and the Am7969 TAXI Receiver interface directly to an 8,
9, or 10 bit data bus. Each TAXlchip has 12 parallel interface lines which are designated
as either Command or Data bits. Command bits implement user defined system
supervisory functions, such as Initialize Your System, Re-try, Halt, or Errorwhich cannot
be embedded in the ordinary data path.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Am7969-175LKC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-125VB3A | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7969-125VB3A | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-175JC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7969-175JC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM7968-175LMC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-175PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-175PCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-70/B3A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
| AM7968-70/BXA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transmitter |
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