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參數(shù)資料
| 型號(hào)： | AM42BDS640AG |
| 廠商： | Spansion Inc. |
| 元件分類： | SRAM |
| 英文描述： | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| 中文描述： | 堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁數(shù)： | 50/72頁 |
| 文件大小： | 1060K |
| 代理商： | AM42BDS640AG |
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November 1, 2002
Am42BDS640AG
53
P R E L I M INARY
AC CHARACTERISTICS
Notes:
1. PA = Program Address, PD = Program Data, VA = Valid
Address for reading status bits.
2. “In progress” and “complete” refer to status of program
operation.
3. A21–A12 are don’t care during command sequence
unlock cycles.
4. Addresses are latched on the first of either the rising edge
of AVD# or the active edge of CLK.
5. Either CS# or AVD# is required to go from low to high in
between programming command sequences.
6. The Synchronous programming operation is independent
of the Set Device Read Mode bit in the Burst Mode
Configuration Register.
7. CLK must not have an active edge while WE# is at VIL.
8. AVD# must toggle during command sequence unlock cy-
cles.
Figure 23.
Synchronous Program Operation Timings
OE#
CE#f
Data
Addresses
AVD#
WE#
CLK
VCC
555h
PD
tAS
tWP
tAH
tWC
tWPH
PA
tVCS
tDH
tCH
In
Progress
tWHWH1
VA
Complete
VA
Program Command Sequence (last two cycles)
Read Status Data
tDS
tAVDP
A0h
tAHW
tACS
tCAS
tACH
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相關(guān)代理商/技術(shù)參數(shù) |
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| AM42BDS640AGBC8IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM42BDS640AGBC8IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Burst Mode Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM |
| AM42BDS640AGBC9IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM42BDS640AGBC9IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM42BDS640AGBD8IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
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