參數(shù)資料
型號(hào)： ALC202
廠商： Electronic Theatre Controls, Inc.
元件分類： 圓形連接器
英文描述： Circular Connector; No. of Contacts:100; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:22-35 RoHS Compliant: No
中文描述： AC\u0026#39;97音頻編解碼器
文件頁(yè)數(shù)： 12/29頁(yè)
文件大小： 598K
代理商： ALC202
Preliminary
Avance Logic, Inc.
ALC202
-
12 -
Rev0.62
http://www.realtek.com.tw
MX26
Powerdown Control/Status
Type
R/W
PR7 External Amplifier Power Down (EAPD) 0: normal 1: Power down
R/W
PR6 0: Normal 1: Power down Headphone Out (HP-OUT)
R/W
PR5 0: Normal 1: Disable internal clock
R/W
PR4 0: Normal 1: Power down AC-Link
R/W
PR3 0: Normal 1: Power down Mixer (Vref off)
R/W
PR2 0: Normal 1: Power down Mixer (Vref still on)
R/W
PR1 0: Normal 1: Power down PCM DAC
R/W
PR0 0: Normal 1: Power down PCM ADC and input MUX
Reserved, Read as 0
R
Vref status 1: Vref is up to normal level 0: Not yet
R
Analog Mixer status 1: Ready 0: Not yet
R
DAC status 1: Ready 0: Not yet
R
ADC status 1: Ready 0: Not yet
Default: 000FH
Bit
15
14
13
12
11
10
9
8
7:4
3
2
1
0
Function
MX28
Extended Audio ID
Type
R
ID1
R
ID0
Reserved, Read as 0
R
REV[1:0]=01 to indicates ALC202 is AC’97 rev2.2 compliant.
R
AMAP read as 1 (DAC mapping based on ID)
Reserved, Read as 0
R/W
DSA[1:0], DAC Slot Assignment
(Default value depends on ID[1:0])
DSA[1:0] control DAC slot assignment described in AC’97 rev2.2.
Reserved, Read as 0
R
SPDIF read as 1 (S/PDIF is supported)
R
DRA read as 1
R
VRA read as 1 (Variable Rate Audio is supported)
ID1 is latched inversely from pin 46 when system reset. ID0 is latched inversely from pin 45
when system reset.
ALC202 maps DAC slot according to the following table: (default maps to AC’97 spec.
rev2.2)
DSA[1:0]
Left DAC slot #
Right DAC slot #
0,0
3
4
0,1
7
8
1,0
6
9
1,1
10
11
Default: 060Fh
Bit
15
14
13:12
11:10
9
8:6
5:4
Function
3
2
1
0
Comment
Default when ID[1:0]=00
Default when ID[1:0]=01,10
Default when ID[1:0]=11
MX2A
Bit
15:11
10
Extended Audio Status and control register
Type
Reserved
R
SPCV
(S/PDIF Configuration Valid)
0: current S/PDIF configuration {SPSA,SPSR,DAC/slot rate} is not valid.
1: current S/PDIF configuration {SPSA,SPSR,DAC/slot rate} is valid.
Reserved
R/W
SPSA[1:0] (S/PDIF Slot Assignment)
00: S/PDIF source data assigned to AC-LINK slot3/4.
01: S/PDIF source data assigned to AC-LINK slot7/8.
10: S/PDIF source data assigned to AC-LINK slot6/9.
Default: 0000H
Function
9:6
5:4
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