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參數(shù)資料
| 型號： | AK4704 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 2ch 24bit DAC with AV SCART switch |
| 中文描述： | 2通道24位DAC，具有影音SCART開關(guān) |
| 文件頁數(shù)： | 18/44頁 |
| 文件大小： | 440K |
| 代理商： | AK4704 |
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ASAHI KASEI
AKM CONFIDENTIAL
[AK4704]
Rev. 0.5
2004/1
- 18 -
Typical Operation Sequence (auto setup mode)
The Figure 2 shows an example of the system timing at auto setup mode.
PDN pin
Low Power Mode
Audio out (DC)
don’t care
Clock, Data in
TVVOUT,
VCRVOUT
Active (loop-through)
TVVIN
Signal in
No Signal
don’t care
Signal in
No Signal
don’t care
VCRVIN
Signal in
No Signal
don’t care
don’t care
Active (loop-through)
Hi-Z
Hi-Z
Active (loop-through)
(GND)
Active (loop-through)
No Signal
No Signal
Hi-Z
Low Power Mode
Low Power Mode
Figure 2. Typical operating sequence (auto setup mode)
Typical Operation Sequence (except auto setup mode)
The Figure 3 shows an example of the system timing at auto setup mode.
PDN pin
GD
D/A Out
(internal)
(1)
TV out
“1” (default)
STBY bit
“0”
“1”
don’t care (2)
Clock in
normal operation
don’t care (2)
don’t care
Data in
don’t care
“0”
GD
(1)
“0”
DAC
TV-Source
select
VCR in
VCR in
“1” (default)
MUTE bit
“0”
“Stand-by“
VCR in
(3)
VCR in
fixed to VCR in(Loop-through)
“1”
“0”
“Stand-by“
“Mute”
Audio data
“1”
(default)
offset calibration
(4)
“1” (default)
AUTO bit
“0”
Notes:
(1) The analog output corresponding to the digital input has a group delay, GD.
(2) The external clocks (MCLK, BICK and LRCK) can be stopped in standby mode.
(3) Mute the analog outputs externally if click noise(3) adversely affects the system.
(4) In case of the CAL bit = “1”, the offset calibration is always executed when the source of TVOUTL/R pins are
switched to DAC after the STBY bit is changed to “0”. To disable this function, set the CAL bit = “0”.
Figure 3. Typical operating sequence (except auto setup mode)
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