
ASAHI KASEI 
[AK4683] 
MS0427-E-01 
2005/11 
- 68 - 
Addr 
06H 
Register Name 
Sampling Speed 
Default 
D7 
0 
0 
D6 
D5 
D4 
D3 
0 
0 
D2 
D1 
D0 
ACKSAI 
0 
ACKSAO
0 
ACKSB
0 
DFSAD 
0 
DFSDA1 
0 
DFSDA0
0 
DFSDA1-0: DAC sampling speed control 
These settings are ignored in Auto Setting Mode. Refer Table 22. 
DFSAD: ADC sampling speed control 
This setting is ignored in Auto Setting Mode. Refer Table 21. 
ACSKB: Auto Setting Mode of PORTB 
0: Disable, Manual Setting Mode  (default) 
1: Enable, Auto Setting Mode 
Master clock frequency is detected automatically at ACKSB bit “1”. In this case, the setting of 
DFSAD, DFSDA1-0 bits of the block connecting this PORT is ignored. When this bit is “0”, 
DFSAD, DFSDA1-0 bits set the sampling speed mode. 
ACSKAO: Auto Setting Mode of PORTA Output 
0: Disable, Manual Setting Mode  (default) 
1: Enable, Auto Setting Mode 
Master clock frequency is detected automatically at ACKSAO bit “1”. In this case, the setting of 
DFSAD, DFSDA1-0 bits of the block connecting this PORT is ignored. When this bit is “0”, 
DFSAD, DFSDA1-0 bits set the sampling speed mode. 
ACSKAI: Auto Setting Mode of PORTA Input 
0: Disable, Manual Setting Mode  (default) 
1: Enable, Auto Setting Mode 
Master clock frequency is detected automatically at ACKSAI bit “1”. In this case, the setting of 
DFSAD, DFSDA1-0 bits of the block connecting this PORT is ignored. When this bit is “0”, 
DFSAD, DFSDA1-0 bits set the sampling speed mode. 
Addr 
07H 
Register Name 
Data Source Select 1 
Default 
D7 
0 
0 
D6 
0 
0 
D5 
DITD1
1 
D4 
DITD0
1 
D3 
D2 
D1 
D0 
SDTOB1
0 
SDTOB0 
1 
SDTOA1 
0 
SDTOA0
1 
SDTOA1-0: Data source control for PORTA 
00: DIR  
01: ADC  (default) 
10: SDTIB 
11: off (“L” output) 
SDTOB1-0: Data source control for PORTB 
00: DIR  
01: ADC  (default) 
10: off (“L” output) 
11: SDTIA1 
DITD1-0: Data source control for DIT 
00: DIR  
01: ADC 
10: SDTIB 
11: SDTIA1  (default)