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參數(shù)資料
| 型號： | AK4633 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 16-Bit Mono CODEC with ALC & MIC/SPK-AMP |
| 中文描述： | 16位單聲道編解碼器ALC的 |
| 文件頁數(shù)： | 77/82頁 |
| 文件大?。?/td> | 688K |
| 代理商： | AK4633 |
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ASAHI KASEI
[AK4633]
MS0447-E-03
2006/04
- 77 -
MONO LINEOUT
FS3-0 bits
(Addr:05H,
D5, D2-0)
OVOL7-0 bits
(Addr:0AH, D7-0)
PMDAC bit
(Addr:00H, D2)
PMAO bit
(Addr:00H, D3)
XXXX
XXXX
XXH
XXH
AOUT pin
(1)
(6)
(2)
DACA bit
(Addr:02H, D4)
(11)
Normal Output
(8)
AOPS bit
(Addr:03H, D6)
(7)
>300 ms
(9)
(10)
>300 ms
(12)
(4)
ALC2 bit
(Addr:07H, D6)
(3)
ADCPF bit
(Addr:03H, D0)
PFDAC bit
(Addr:03H, D1)
0 or 1
0
0 or 1
1
0 or 1
0
(5)
PMPFIL bit
(Addr:00H, D7)
Example:
PLL, Master Mode
Audio I/F Format :DSP Mode, BCKP=MSBS= “0”
Sampling Frequency: 16kHz
Digital Volume: 0dB
(1) Addr:05H, Data:02H
(2) Addr:02H, Data:10H
(3) Addr:03H, Data:02H
(4) Addr:07H, Data:00H
(5) Addr:0AH, Data:91H
(6) Addr:03H, Data:42H
(7) Addr:00H, Data:CCH
(8) Addr:03H, Data:02H
Playback
(9) Addr:03H, Data:42H
(10) Addr:00H, Data:40H
(11) Addr:02H, Data:00H
(12) Addr:03H, Data:02H
Figure 56. Mono Lineout Sequence
<Example>
This sequence is an example of Digital Output Volume at manual mode.
At first, clocks should be supplied according to
“
Clock Set Up
”
sequence.
(1) Set up a sampling frequency (FS3-0 bits).
DAC should be powered-up in consideration of PLL lock time.
(2) Set up the path of
“
DAC
Mono Line Amp
”
: DACA bit:
“
0
”
→
“
1
”
(3) Set up the path: ADCPF bit =
“
0
”
, PFDAC bit =
“
1
”
(4) Disable ALC2: ALC2 bit =
“
0
”
(5) Set up the digital volume (Addr: 0AH)
(6) Enter the power-save-mode of AOUT: AOPS bit:
“
0
”
→
“
1
”
(7) Power Up DAC, programming filter and mono lineout.
PMDAC bit = PMPFIL bit = PMAO bit =
“
0
”
→
“
1
”
AOUT pin powers up at rise edge. The rise time is 300ms(max) when C = 1
μ
F.
(8) Exit the power-save-mode of AOUT: AOPS bit:
“
1
”
→
“
0
”
The setting should be down after AOUT pin rises up. After the setting, the signal is output from AOUT pin.
(9) Enter the power-save-mode of AOUT: AOPS bit:
“
0
”
→
“
1
”
(10) Power Down DAC, programmable filter and mono lineout.
PMDAC bit = PMPFIL bit = PMAO bit =
“
1
”
→
“
0
”
AOUT pin powers up at fall edge. The fall time is 300ms(max) when C = 1
μ
F.
(11) Disable the path of
“
DAC
Mono Line Amp
”
: DACA bit:
“
1
”
→
“
0
”
(12) Exit the power-save-mode of AOUT: AOPS bit:
“
1
”
→
“
0
”
The setting should be down after the AOUT pin fall down.
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PDF描述 |
|---|---|
| AK4640 | 16BIT CODEC WITH MIC /HP/SPK-AMPl |
| AK4640VG | 16BIT CODEC WITH MIC /HP/SPK-AMPl |
| AK4640VN | 16BIT CODEC WITH MIC /HP/SPK-AMPl |
| AK4642EN | Stereo CODEC with MIC/HP/SPK-AMP |
| AK4643EN | Stereo CODEC with MIC/HP/RCV/SPK-AMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4633ENP-L | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:LOW COST MONO CODEC WITH SPK A |
| AK4633VN | 制造商:AKM 制造商全稱:AKM 功能描述:16bit mono CODEC with MIC/SPK amplifier. |
| AK4633VNP-L | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:LOW COST MONO CODEC WITH SPK A |
| AK4634 | 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit Mono CODEC with ALC & MIC/SPK-AMP |
| AK4635 | 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit Mono CODEC with ALC & MIC/SPK/Video-AMP |
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