參數(shù)資料
型號: AK4632
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 16-Bit ツヒ Mono CODEC with ALC & MIC/SPK/Video-AMP
中文描述: 16位ツヒALC的單聲道編解碼器
文件頁數(shù): 67/70頁
文件大小: 639K
代理商: AK4632
ASAHI KASEI
[AK4632]
MS0396-E-00
2005/06
- 67 -
Stop of Clock
Master clock can be stopped when ADC, DAC, ALC1, ALC2 and IPGA don’t operate.
1. In case of PLL Master Mode
MCKPD bit
(Addr:01H, D2)
External MCKI
PMPLL bit
(Addr:01H, D0)
MCKO bit
(Addr:01H, D1)
Input
(4)
(1)
(2)
(3)
"H" or "L"
Example:
Audio I/F Format: DSP Mode, BCKP = MSBS = “0”
BICK frequency at Master Mode : 64fs
Input Master Clock Select at PLL Mode : 11.2896MHz
Sampling Frequency:8kHz
Stop an external MCKI
(1) (2) (3) Addr:01H, Data:0CH
Figure 56. Clock Stopping Sequence (1)
<Example>
(1) Power down PLL: PMPLL bit =
1
0
(2) Stop MCKO clock: MCKO bit =
1
0
(3) Pull down the MCKI pin: MCKPD bit =
0
1
When the external master clock becomes Hi-Z, MCKI pin should be pulled down.
(4) Stop an external master clock.
2. When an external clocks (FCK or BICK pins) are used in PLL Slave Mode.
External BICK
PMPLL bit
(Addr:01H, D0)
Input
(1)
(2)
External FCK
Input
(2)
Example
Audio I/F Format : DSP Mode, BCKP = MSBS = “0”
PLL Reference clock: BICK
BICK frequency: 64fs
Sampling Frequency: 8kHz
(1) Addr:01H, Data:04H
(2) Stop the external clocks
Figure 57. Clock Stopping Sequence (2)
<Example>
(1) Power down PLL: PMPLL bit =
1
0
(2) Stop the external BICK and FCK clocks
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AK4633VN 制造商:AKM 制造商全稱:AKM 功能描述:16bit mono CODEC with MIC/SPK amplifier.
AK4633VNP-L 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:LOW COST MONO CODEC WITH SPK A