參數(shù)資料
型號: AK4538VN
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 16Bit DS CODEC with MIC/HP/SPK-AMP
中文描述: 16位副編解碼器麥克風(fēng)/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù): 34/70頁
文件大小: 485K
代理商: AK4538VN
ASAHI KASEI
[AK4538]
MS0198-E-01
2003/5
- 34 -
n
Speaker Output
Mono signal [(L+R)/2] converted from stereo DAC output and BEEP input signal can be output via Speaker-amp which is
controlled by BTL. ALC2 circuit is available for DAC output signal. This Speaker-amp can deliver a maximum power of
300mW(typ)@THD=10%, 250mW(typ)@THD=0.1% into 8 ohm load at HVDD=3.3V. Maximum output power is
137mW(typ) when DAC output signal is output via ALC2 circuit as system design example (Figure 46). When BEEP input
is used for DAC output, maximum power becomes 300mW. Figure 29 and Figure 30 indicates connection examples for
300mW output.
Speaker blocks (MOUT2, ALC2 and Speaker-amp) can be powered up/down by controlling the PMSPK bit. When the
PMSPK bit is “0”, the MOUT2, SPP and SPN pins are placed in a Hi-Z state.
When the SPPS bit is “0”, the Speaker-amp enters power-save-mode. In this mode, the SPP pin is placed in a Hi-Z state and
the SPN pin goes to HVDD/2 voltage. And then the Speaker output gradually changes to the HVDD/2 voltage and this
mode can reduce pop noise at power-up. When the AK4538 is powered down, pop noise can be also reduced by first
entering power-save-mode.
PMSPK bit
SPPS bit
SPP pin
SPN pin
HVDD/2
HVDD/2
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Figure 28. Power-up/Power-down Timing for Speaker-amp
[Connection Example for 300mW output]
(1) Using BEEPM pin
13k
MOUT2
0.047u
BEEPM
20k
±
30%
45%AVDD
BPMSP
SPP
SPN
SPK-Amp
AK4538
Figure 29. Connection example for 300mW output using BEEPM pin
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