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參數(shù)資料
| 型號： | AK4536VN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 16-Bit Mono CODEC with ALC & MIC/SPK-AMP |
| 中文描述： | 16位單聲道編解碼器ALC的 |
| 文件頁數(shù)： | 57/59頁 |
| 文件大小： | 403K |
| 代理商： | AK4536VN |
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ASAHI KASEI
[AK4536]
MS0174-E-00
2002/09
- 57 -
3. PLL & Slave mode
External BICK
PMPLL bit
(Addr:01H, D5)
Input
(1)
(2)
External FCK
Input
(2)
Example
Audio I/F Format : DSP Mode, BCKP = MSBS = “0”
PLL Reference clock: BICK
BICK frequency: 64fs
Sampling Frequency: 8kHz
(1) Addr:01H, Data:04H
(2) Stop the external clocks
Figure 42. Stop of Clock Sequence (3)
<Example>
(1) Power down PLL: PMPLL bit = “1”
→
“0”
(2) Stop the external BICK and FCK clocks.
4. EXT mode
MCKPD bit
(Addr:01H, D7)
External FCK
PMXTL bit
(Addr:01H, D1)
Input
(1)
(2)
(1)
"H" or "L"
External BICK
Input
(2)
External MCKI
Input
(2)
Example
Audio I/F Format :MSB justified(ADC and DAC)
Input MCKI frequency:1024fs
MCKI pin: CMOS Level
Sampling Frequency:8kHz
(2) Stop the external clocks
(1) Addr:01H, Data:04H
Figure 43. Stop of Clock Sequence (4)
<Example>
(1) Pull down the MCKI pin: MCKPD bit = “0”
→
“1”
Power down X’tal: PMXTL bit = “1”
→
“0”
When the external master clock becomes Hi-Z or the external master clock is input by AC couple, MCKI pin
should be pulled down. When the external master clock is input by AC couple, X’tal should be
powered-down.
(2) Stop the external MCKI, BICK and FCK clocks
n
Power down
Power down VCOM (PMVCM= “1”
→
“0”) after all blocks except VCOM are powered down and a master clock stops.
The AK4536 is also powered-down by PDN pin = “L”. When PDN pin = “L”, the registers are initialized.
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| AK4537 | 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit ΔΣ Stereo CODEC with MIC/HP/SPK-AMP |
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| AK4538 | 制造商:AKM 制造商全稱:AKM 功能描述:16Bit DS CODEC with MIC/HP/SPK-AMP |
| AK4538VN | 制造商:AKM 制造商全稱:AKM 功能描述:16Bit DS CODEC with MIC/HP/SPK-AMP |
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