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參數(shù)資料
| 型號： | AK4394VF |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | ADVANCED MULTI-BIT 192KHZ 24-BIT DAC |
| 中文描述： | 先進的多位192kHz的24位DAC |
| 文件頁數(shù)： | 17/26頁 |
| 文件大?。?/td> | 299K |
| 代理商： | AK4394VF |
ASAHI KASEI
[AK4394]
M0081-E-00
1999/11
- 17 -
n
Reset Function
When RSTN = ”0”, the AK4394’s digital section is powered down but the internal register values are not initialized. The
analog outputs go to VCOM voltage and DZF pins of both channels go to “H”. Figure 7 shows the example of reset by
RSTN bit.
Internal
State
RSTN bit
Digital Block Power-down
Normal Operation
GD
GD
“0” data
D/A Out
(Analog)
D/A In
(Digital)
Clock In
MCLK,LRCK,BICK
(1)
(3)
DZFL/DZFR
(3)
(1)
(2)
Normal Operation
2/fs(5)
Internal
RSTN bit
2~3/fs (6)
3~4/fs (6)
Don’t care
(4)
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs go to VCOM voltage.
(3)
Click noise occurs at the edges(“
-
ˉ
”) of the internal timing of RSTN bit.
This noise is output even if “0” data is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the reset mode (RSTN = “L”).
(5) DZF pins go to “H” when the RSTN bit becomes “0”, and go to “L” at 2/fs after RSTN bit becomes “1”.
(6) There is a delay, 3~4/fs from RSTN bit “0” to the internal RSTN bit “0”, and 2~3/fs from RSTN bit “1” to the
internal RSTN “1”.
Figure 7. Reset sequence example
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| AK4395VFP-E2 | 功能描述:IC DAC 24BIT STEREO 28VSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:2,400 系列:- 設置時間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應商設備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率（每秒）:* |
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