參數(shù)資料
型號(hào): AK4345
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 100dB 96kHz 24-Bit Stereo 3.3V ツヒ DAC with DIT
中文描述: 100dB的96kHz的24位立體聲3.3ツヒDAC,具有動(dòng)態(tài)網(wǎng)
文件頁數(shù): 16/26頁
文件大?。?/td> 540K
代理商: AK4345
[AK4345]
Reset Function
(1) Reset by RSTN bit
When RSTN bit =0, DAC is powered down but the internal register values are not initialized. The analog outputs go to
VCOM voltage Figure 18 shows the example of reset by RSTN bit.
RSTN bit
Internal
State
Digital Block
P
d
Normal Operation
GD
GD
“0” data
D/A Out
(Analog)
D/A In
(Digital)
Clock In
MCLK,LRCK,BICK
(1)
(3)
(3)
(1)
(2)
Normal Operation
Internal
RSTN bit
2~3/fs (6)
3~4/fs (6)
Don’t care
(4)
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs go to VCOM voltage (VDD/2).
(3) Click noise occurs at the edges(“
”) of the internal timing of RSTN bit. This noise is output even if “0” data is
input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the reset mode (RSTN bit = “0”).
(5) There is a delay, 3~4/fs from RSTN bit “0” to the internal RSTN bit “0”, and 2~3/fs from RSTN bit “1” to the
internal RSTN bit “1”.
Figure 18. Reset Sequence Example1
MS0635-E-00
2007/06
- 16 -
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