參數(shù)資料
型號： ADV7850KBCZ-5
廠商： Analog Devices Inc
文件頁數(shù)： 8/32頁
文件大?。?/td> 0K
描述： IC VIDEO DECODER 3D 425CSPBGA
標準包裝： 1
類型： HDMI，接收器
應用： HDTV，投影儀，機頂盒
安裝類型： 表面貼裝
封裝/外殼： 425-LFBGA，CSBGA
供應商設備封裝： 425-CSPBGA（19x19）
包裝： 托盤
ADV7850
Data Sheet
Rev. 0 | Page 16 of 32
Pin No.
Mnemonic
Description
C7
GND
Ground.
C8
VDD_EEPROM
External EDID EEPROM Power Supply.
C9
TVDD
HDMI Termination Supply (3.3 V).
C10
TVDD
HDMI Termination Supply (3.3 V).
C11
TVDD
HDMI Termination Supply (3.3 V).
C12
TVDD
HDMI Termination Supply (3.3 V).
C13
TVDD
HDMI Termination Supply (3.3 V).
C14
TVDD
HDMI Termination Supply (3.3 V).
C15
GND
Ground.
C16
TVDD
HDMI Termination Supply (3.3 V).
C17
TVDD
HDMI Termination Supply (3.3 V).
C18
TVDD
HDMI Termination Supply (3.3 V).
C19
TVDD
HDMI Termination Supply (3.3 V).
C20
GND
Ground.
C21
GND
Ground.
C22
ACMUXIN_1R
Audio Codec Mux Input 1 Right Channel.
C23
ACMUXIN_1L
Audio Codec Mux Input 1 Left Channel.
D1
RXA_0+
Digital Input Channel 0 True of Port A in the HDMI Interface.
D2
RXA_0
Digital Input Channel 0 Complement of Port A in the HDMI Interface.
D3
CVDD
HDMI Comparator Supply (1.8 V).
D4
RXD_5V
5 V Detect Pin for Port D in the HDMI Interface.
D5
VGA_5V
5 V Detect I/O for VGA Connector.
D6
DDCA_SCL
Serial Clock for DDC Bus of Port A. DDCA_SCL is 5 V tolerant.
D7
DDCA_SDA
Serial Data for DDC Bus of Port A. DDCA_SDA is 5 V tolerant.
D8
DDCB_SCL
Serial Clock Port for DDC Bus of Port B. DDCB_SCL is 5 V tolerant.
D9
DDCB_SDA
Serial Data Port for DDC Bus of Port B. DDCB_SDA is 5 V tolerant.
D10
DDCC_SCL
Serial Clock Port for DDC Bus of Port C. DDCC_SCL is 5 V tolerant.
D11
DDCC_SDA
Serial Data Port for DDC Bus of Port C. DDCC_SDA is 5 V tolerant.
D12
DDCD_SCL
Serial Clock Port for DDC Bus of Port D. DDCD_SCL is 5 V tolerant.
D13
DDCD_SDA
Serial Data Port for DDC Bus of Port D. DDCD_SDA is 5 V tolerant.
D14
VREG
Voltage Regulator Output. Must be decoupled to GND via 1 F capacitor.
D15
GND
Ground.
D16
VGA_SCL
Serial Clock for VGA Interface. VGA_SCL is 5 V tolerant.
D17
VGA_SDA
Serial Data for VGA Interface. VGA_SDA is 5 V tolerant.
D18
TVDD
HDMI Termination Supply (3.3 V).
D19
AC_AVDD
Audio Block Supply (3.3 V).
D20
AC_AVDD
Audio Block Supply (3.3 V).
D21
AC_AVDD
Audio Block Supply (3.3 V).
D22
ACMUXIN_2R
Audio Codec Mux Input 2 Right Channel.
D23
ACMUXIN_2L
Audio Codec Mux Input 2 Left Channel.
E1
RXA_1+
Digital Input Channel 1 True of Port A in the HDMI Interface.
E2
RXA_1
Digital Input Channel 1 Complement of Port A in the HDMI Interface.
E3
CVDD
HDMI Comparator Supply (1.8 V).
E4
RXC_5V
5 V Detect Pin for Port C in the HDMI Interface.
E20
GND
Ground.
E21
GND
Ground.
E22
ACMUXIN_3R
Audio Codec Mux Input 3 Right Channel.
E23
ACMUXIN_3L
Audio Codec Mux Input 3 Left Channel.
F1
RXA_2+
Digital Input Channel 2 True of Port A in the HDMI Interface.
F2
RXA_2
Digital Input Channel 2 Complement of Port A in the HDMI Interface.
F3
CVDD
HDMI Comparator Supply (1.8 V).
F4
RXB_5V
5 V Detect Pin for Port B in the HDMI Interface.
F20
PLL_LF
Loop Filter Ball for Audio Codec PLL.
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