Figure 3. I2C Timing <" />
參數(shù)資料
型號(hào): ADV7850KBCZ-5
廠商: Analog Devices Inc
文件頁數(shù): 3/32頁
文件大小: 0K
描述: IC VIDEO DECODER 3D 425CSPBGA
標(biāo)準(zhǔn)包裝: 1
類型: HDMI,接收器
應(yīng)用: HDTV,投影儀,機(jī)頂盒
安裝類型: 表面貼裝
封裝/外殼: 425-LFBGA,CSBGA
供應(yīng)商設(shè)備封裝: 425-CSPBGA(19x19)
包裝: 托盤
Data Sheet
ADV7850
Rev. 0 | Page 11 of 32
TIMING DIAGRAMS
Figure 3. I2C Timing
Figure 4. HDMI Audio I2S Timing
Figure 5. SPI Master Mode Timing
07758-
0
03
SDA
SCL
t5
t3
t4
t8
t6
t7
t2
t1
t3
HA_SCLK
LRCLK
I2Sx
LEFT-JUSTIFIED
MODE
I2Sx
RIGHT-JUSTIFIED
MODE
I2Sx
I2S MODE
MSB
MSB – 1
t15
t16
t17
t19
t20
t18
MSB
MSB – 1
LSB
MSB
t19
t20
t19
t20
NOTES
1. THE SUFFIX x REFERS TO THE I2S OUTPUT 0, 1, 2, 3.
2. LRCLK IS A SIGNAL ACCESSIBLE VIA HA_AP5 BALL.
3. I2Sx ARE SIGNALS ACCESSIBLE VIA HA_AP1 TO HA_AP4 BALL.
07758
-004
07758
-0
07
t21
t22
t23
t24
TTX_SCLK
TTX_MOSI
TTX_CS
TTX_MISO
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