參數(shù)資料
型號: ADV7344
廠商: Analog Devices, Inc.
英文描述: Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs
中文描述: 多格式視頻編碼器6 14位噪聲整形視頻DAC
文件頁數(shù): 39/88頁
文件大小: 1078K
代理商: ADV7344
ADV7344
SR7 to
SR0
0x88
Rev. 0 | Page 39 of 88
Register
SD Mode
Register 7
Bit Description
Reserved.
SD Noninterlaced Mode.
Bit Number
5
4
0
0
1
1
0
1
0
0
0
1
1
0
1
1
Register Setting
Disabled.
Enabled.
Disabled.
Enabled.
8-bit input.
16-bit input.
10-bit input.
20-bit input.
Disabled.
Enabled.
Disabled.
Enabled.
Gamma Correction Curve A.
Gamma Correction Curve B.
Disabled.
11 IRE.
6 IRE.
1.5 IRE.
0 must be written to this bit.
Disabled.
Enabled.
Disabled.
4 clock cycles.
8 clock cycles.
Reserved.
0 must be written to these bits.
Reset
Value
0x00
7
0
1
0
6
0
1
0
3
0
1
0
1
0
1
2
0
1
0
1
0
1
0
0
1
1
0
0
0
1
0
1
SD Double Buffering.
SD Input Format.
SD Digital Noise Reduction.
SD Gamma Correction Enable.
SD Gamma Correction Curve Select.
0x00
SD Undershoot Limiter.
Reserved.
SD Black Burst Output on DAC
Luma.
SD Chroma Delay.
0x89
SD Mode
Register 8
Reserved.
1
When set to 0, the horizontal/vertical counters automatically wrap around at the end of the line/field/frame of the selected standard. When set to 1, the
horizontal/vertical counters are free running and wrap around when external sync signals indicate to do so.
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