參數(shù)資料
型號: ADV7344
廠商: Analog Devices, Inc.
英文描述: Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs
中文描述: 多格式視頻編碼器6 14位噪聲整形視頻DAC
文件頁數(shù): 31/88頁
文件大?。?/td> 1078K
代理商: ADV7344
ADV7344
Table 18. Register 0x30
SR7 to
SR0
Register
0x30
ED/HD Mode
Register 1
Rev. 0 | Page 31 of 88
Bit Description
ED/HD Output
Standard.
Bit Number
5
4
Register Setting
EIA770.2 output.
EIA770.3 output.
EIA770.1 output.
Output levels for full
input range.
Reserved.
External HSYNC, VSYNC
and field inputs
1
.
Embedded EAV/SAV
codes.
SMPTE 293M,
ITU-BT.1358.
Nonstandard timing mode.
BTA-1004, ITU-BT.1362.
ITU-BT.1358.
ITU-BT.1362.
SMPTE 296M-1,
SMPTE 274M-2.
SMPTE 296M-3.
SMPTE 296M-4,
SMPTE 274M-5.
SMPTE 296M-6.
SMPTE 296M-7,
SMPTE 296M-8.
SMPTE 240M.
Reserved.
Reserved.
SMPTE 274M-4,
SMPTE 274M-5.
SMPTE 274M-6.
SMPTE 274M-7,
SMPTE 274M-8.
SMPTE 274M-9.
SMPTE 274M-10,
SMPTE 274M-11.
ITU-R BT.709-5.
Reserved.
Note
ED
HD
Reset
Value
0x00
7
6
3
2
1
0
0
0
0
1
1
0
0
1
1
ED/HD Input
Synchronization
Format.
1
0
0
0
0
0
525p @ 59.94 Hz
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
0
0
1
0
1
0
1
525p @ 59.94 Hz
625p @ 50 Hz
625p @ 50 Hz
720p @ 60/59.94 Hz
0
0
0
0
1
1
1
1
0
1
720p @ 50 Hz
720p @ 30/29.97 Hz
0
0
1
1
0
0
0
0
0
1
720p @ 25 Hz
720p @ 24/23.98 Hz
0
0
0
0
1
1
1
1
0
0
1
1
1
1
0
0
0
1
0
1
1035i @ 60/59.94 Hz
1080i @ 30/29.97 Hz
0
0
1
1
1
1
1
1
0
1
1080i @ 25 Hz
1080p @ 0/29.97 Hz
1
1
0
0
0
0
0
0
0
1
1080p @ 25 Hz
1080p @ 4/23.98 Hz
1
0
0
1
0
1080Psf @ 24 Hz
ED/HD Input Mode.
10011–11111
1
Synchronization can be controlled with a combination of either HSYNC and VSYNC inputs or HSYNC and field inputs, depending on Subaddress 0x34, Bit 6.
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