參數(shù)資料
型號(hào): ADV7194KST
廠商: ANALOG DEVICES INC
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: Professional Extended-10⑩ Video Encoder with 54 MHz Oversampling
中文描述: COLOR SIGNAL ENCODER, PQFP80
封裝: LQFP-80
文件頁數(shù): 25/69頁
文件大?。?/td> 647K
代理商: ADV7194KST
ADV7194
–25–
REV. 0
Mode 1: Master Option
HSYNC
,
BLANK
, FIELD
(Timing Register 0 TR0 = X X X X X 0 1 1)
In this mode the ADV7194 can generate Horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD input when
HSYNC
is low indicates a new frame, i.e., Vertical Retrace. The
BLANK
signal is optional. When the
BLANK
input is disabled the
ADV7194 automatically blanks all normally blank lines as per CCIR-624. Pixel data is latched on the rising clock edge follow-
ing the timing signal transitions. Mode 1 is illustrated in Figure 42 (NTSC) and Figure 43 (PAL). Figure 44 illustrates the
HSYNC
,
BLANK
and FIELD for an odd-or-even field transition relative to the pixel data.
FIELD
PIXEL
DATA
PAL = 12 CLOCK/2
NTSC = 16 CLOCK/2
Cb
Y
Cr
Y
HSYNC
BLANK
PAL = 132 CLOCK/2
NTSC = 122 CLOCK/2
Figure 44. Timing Mode 1 Odd/Even Field Transitions Master/Slave
Mode 2: Slave Option
HSYNC
,
VSYNC,
BLANK
(Timing Register 0 TR0 = X X X X X 1 0 0)
In this mode the ADV7194 accepts Horizontal and Vertical SYNC signals. A coincident low transition of both
HSYNC
and
VSYNC
inputs indicates the start of an Odd Field. A
VSYNC
low transition when
HSYNC
is high indicates the start of an Even Field. The
BLANK
signal is optional. When the
BLANK
input is disabled, the ADV7194 automatically blanks all normally blank lines as per
CCIR-624. Mode 2 is illustrated in Figure 45 (NTSC) and Figure 46 (PAL).
522
523
524
525
1
2
3
4
5
6
7
8
9
10
11
20
21
22
DISPLAY
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
HSYNC
BLANK
VSYNC
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
283
284
285
ODD FIELD
EVEN FIELD
DISPLAY
DISPLAY
VERTICAL BLANK
HSYNC
BLANK
VSYNC
Figure 45. Timing Mode 2, NTSC
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