參數(shù)資料
型號: ADUC848BCPZ8-5
廠商: Analog Devices Inc
文件頁數(shù): 93/108頁
文件大?。?/td> 0K
描述: IC MCU FLASH W/16BIT ADC 56-CSP
標(biāo)準(zhǔn)包裝: 1
系列: MicroConverter® ADuC8xx
核心處理器: 8052
芯體尺寸: 8-位
速度: 12.58MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: POR,PSM,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 2.25K x 8
電壓 - 電源 (Vcc/Vdd): 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x16b; D/A 1x12b,2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
包裝: 托盤
Data Sheet
ADuC845/ADuC847/ADuC848
Rev. C | Page 85 of 108
INTERRUPT SYSTEM
The ADuC845/ADuC847/ADuC848 provide nine interrupt sources with two priority levels. The control and configuration of the
interrupt system is carried out through three interrupt-related SFRs:
IE
Interrupt Enable Register
IP
Interrupt Priority Register
IEIP2
Secondary Interrupt Enable Register
IE—Interrupt Enable Register
SFR Address:
A8H
Power-On Default:
00H
Bit Addressable:
Yes
Table 58. IE SFR Bit Designations
Bit No.
Name
Description
7
EA
Set by the user to enable all interrupt sources.
Cleared by the user to disable all interrupt sources.
6
EADC
Set by the user to enable the ADC interrupt.
Cleared by the user to disable the ADC interrupt.
5
ET2
Set by the user to enable the Timer 2 interrupt.
Cleared by the user to disable the Timer 2 interrupt.
4
ES
Set by the user to enable the UART serial port interrupt.
Cleared by the user to disable the UART serial port interrupt.
3
ET1
Set by the user to enable the Timer 1 interrupt.
Cleared by the user to disable the Timer 1 interrupt.
2
EX1
Set by the user to enable External Interrupt 1 (INT0).
Cleared by the user to disable External Interrupt 1 (INT0).
1
ET0
Set by the user to enable the Timer 0 interrupt.
Cleared by the user to disable the Timer 0 interrupt.
0
EX0
Set by the user to enable External Interrupt 0 (INT0).
Cleared by the user to disable External Interrupt 0 (INT0).
IP—Interrupt Priority Register
SFR Address:
B8H
Power-On Default:
00H
Bit Addressable:
Yes
Table 59. IP SFR Bit Designations
Bit No.
Name
Description
7
-----
Not Implemented. Write Don’t Care.
6
PADC
ADC Interrupt Priority (1 = High; 0 = Low).
5
PT2
Timer 2 Interrupt Priority (1 = High; 0 = Low).
4
PS
UART Serial Port Interrupt Priority (1 = High; 0 = Low).
3
PT1
Timer 1 Interrupt Priority (1 = High; 0 = Low).
2
PX1
INT0 (External Interrupt 1) priority (1 = High; 0 = Low).
1
PT0
Timer 0 Interrupt Priority (1 = High; 0 = Low).
0
PX0
INT0 (External Interrupt 0) Priority (1 = High; 0 = Low).
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