參數(shù)資料
型號(hào)： ADUC848BCPZ8-5
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 34/108頁(yè)
文件大?。?/td> 0K
描述： IC MCU FLASH W/16BIT ADC 56-CSP
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 12.58MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： POR，PSM，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 10x16b; D/A 1x12b，2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 56-VFQFN 裸露焊盤(pán)，CSP
包裝： 托盤(pán)
Data Sheet
ADuC845/ADuC847/ADuC848
Rev. C | Page 31 of 108
ADC Noise Performance with Chop Disabled (CHOP = 1)
noise and output peak-to-peak resolution in bits (rounded to
the nearest 0.5 LSB) for some typical output update rates. The
numbers are typical and are generated at a differential input
voltage of 0 V and a common-mode voltage of 2.5 V. The output
update rate is selected via the SF7 to SF0 bits in the SF filter
register. Note that the peak-to-peak resolution figures represent
the resolution for which there is no code flicker within a 6-sigma
limit.
The output noise comes from two sources. The first source is
the electrical noise in the semiconductor devices (device noise)
used in the implementation of the modulator. The second
source is quantization noise, which is added when the analog
input is converted to the digital domain. The device noise is at a
low level and is independent of frequency. The quantization
noise starts at an even lower level but rises rapidly with increasing
frequency to become the dominant noise source.
The numbers in the tables are given for the bipolar input ranges.
For the unipolar ranges, the rms noise numbers are the same as
the bipolar range, but the peak-to-peak resolution is based on
half the signal range, which effectively means losing 1 bit of
resolution. Typically, the performance of the ADC with chop
disabled shows a 0.5 LSB degradation over the performance
with chop enabled.
Table 14. ADuC845 and ADuC847 Typical Output RMS Noise (V) vs. Input Range and Update Rate with Chop Disabled
Table 15. ADuC845 and ADuC847 Typical Peak-to-Peak Resolution (Bits) vs. Input Range and Update Rate with Chop Disabled
Table 16. ADuC848 Typical Output RMS Noise (V) vs. Input Range and Update Rate with Chop Disabled
Table 17. ADuC848 Typical Peak-to-Peak Resolution (Bits) vs. Input Range and Update Rate with Chop Disabled
SF Word
Data Update
Rate (Hz)
Input Range
±20 mV
±40 mV
±80 mV
±160 mV
±320mV
±640mV
±1.28 V
±2.56 V
3
1365.33
7.5
9
13
315.08
11.5
12.5
13.5
14
13.5
14
68
59.36
13
14
14.5
15.5
16
82
49.95
13
14
15
16
255
16.06
13.5
14.5
15.5
16
SF Word
Data Update
Rate (Hz)
Input Range
±20 mV
±40 mV
±80 mV
±160 mV
±320 mV
±640 mV
±1.28 V
±2.56 V
3
1365.33
30.64
24.5
56.18
100.47
248.39
468.65
774.36
1739.5
13
315.08
2.07
1.95
2.28
3.24
8.22
13.9
20.98
49.26
68
59.36
0.85
0.79
1.01
0.99
0.79
1.29
2.3
3.7
82
49.95
0.83
0.77
0.85
0.77
0.91
1.12
1.59
3.2
255
16.06
0.52
0.58
0.59
0.48
0.52
0.57
1.16
1.68
SF Word
Data Update
Rate (Hz)
Input Range
±20 mV
±40 mV
±80 mV
±160 mV
±320 mV
±640 mV
±1.28 V
±2.56 V
3
1365.33
7.5
9
13
315.08
11.5
12.5
13.5
14
13.5
14
68
59.36
13
14
14.5
15.5
17
17.5
18
82
49.95
13
14
15
16
16.5
17.5
18
255
16.06
13.5
14.5
15.5
16.5
17.5
18.5
19
SF Word
Data Update
Rate (Hz)
Input Range
±20 mV
±40 mV
±80 mV
±160 mV
±320 mV
±640 mV
±1.28 V
±2.56 V
3
1365.33
30.64
24.5
56.18
100.47
248.39
468.65
774.36
1739.5
13
315.08
2.07
1.95
2.28
3.24
8.22
13.9
20.98
49.26
69
59.36
0.85
0.79
1.01
0.99
0.79
1.29
2.3
3.7
82
49.95
0.83
0.77
0.85
0.77
0.91
1.12
1.59
3.2
255
16.06
0.52
0.58
0.59
0.48
0.52
0.57
1.16
1.68
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