參數(shù)資料
型號(hào)： ADUC812BCPZ-REEL
廠商： ANALOG DEVICES INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 11.0592 MHz, MICROCONTROLLER, PQCC56
封裝： LEAD FRAME, CSP-56
文件頁(yè)數(shù)： 31/60頁(yè)
文件大小： 1276K
代理商： ADUC812BCPZ-REEL
REV. E
ADuC812
–37–
Timer 1 Generated Baud Rates
When Timer 1 is used as the baud rate generator, the baud rates
in Modes 1 and 3 are determined by the Timer 1 overflow rate and
the value of SMOD as follows:
The Timer 1 interrupt should be disabled in this application.
The timer itself can be configured for either timer or counter
operation, and in any of its three running modes. In the most
typical application, it is configured for timer operation in the
Autoreload mode (high nibble of TMOD = 0010 binary). In that
case, the baud rate is given by the formula:
Table XX shows some commonly used baud rates and how they
might be calculated from a core clock frequency of 11.0592 MHz
and 12 MHz. Generally speaking, a 5% error is tolerable using
asynchronous (start/stop) communications.
Table XX. Commonly Used Baud Rates, Timer 1
Ideal
Core
SMOD
TH1-Reload
Actual
%
Baud
CLK
Value
Baud
Error
9600
12
1
–7 (F9H)
8929
7
19200
11.0592
1
–3 (FDH)
19200
0
9600
11.0592
0
–3 (FDH)
9600
0
2400
11.0592
0
–12 (F4H)
2400
0
Timer 2 Generated Baud Rates
Baud rates can also be generated using Timer 2. Using Timer 2 is
similar to using Timer 1 in that the timer must overflow 16 times
before a bit is transmitted/received. Because Timer 2 has a 16-bit
Autoreload mode, a wider range of baud rates is possible using
Timer 2.
Modes and
Baud Rate
Timer
Overflow Rate
13
=
() × ()
116
2
Therefore, when Timer 2 is used to generate baud rates, the
timer increments every two clock cycles and not every core
machine cycle as before. Therefore, it increments six times
faster than Timer 1, and baud rates six times faster are possible.
Because Timer 2 has 16-bit autoreload capability, very low baud
rates are still possible.
Timer 2 is selected as the baud rate generator by setting the TCLK
and/or RCLK in T2CON. The baud rates for transmit and receive
can be simultaneously different. Setting RCLK and/or TCLK puts
Timer 2 into its baud rate generator mode as shown in Figure 34.
In this case, the baud rate is given by the formula:
Modes and
Baud Rate
Core Clk
RCAP H RCAP L
13
=
()
×
()
[]
()
32
65536
2
,
Table XXI shows some commonly used baud rates and how they
might be calculated from a core clock frequency of 11.0592 MHz
and 12 MHz.
Table XXI. Commonly Used Baud Rates, Timer 2
Ideal
Core
RCAP2H
RCAP2L
Actual
%
Baud
CLK
Value
Baud
Error
19200
12
–1 (FFH)
–20 (ECH)
19661
2.4
9600
12
–1 (FFH)
–41 (D7H)
9591
0.1
2400
12
–1 (FFH)
–164 (5CH) 2398
0.1
1200
12
–2 (FEH)
–72 (B8H)
1199
0.1
19200
11.0592
–1 (FFH)
–18 (EEH)
19200
0
9600
11.0592
–1 (FFH)
–36 (DCH) 9600
0
2400
11.0592
–1 (FFH)
–144 (70H) 2400
0
1200
11.0592
–2 (FFH)
–32 (E0H)
1200
0
CORE
CLK
2
T2
PIN
TR2
CONTROL
TL2
(8 BITS)
TH2
(8 BITS)
RELOAD
EXEN2
CONTROL
T2EX
PIN
RCAP2L
RCAP2H
NOTE: OSCILLATOR FREQUENCY
IS DIVIDED BY 2, NOT 12.
TIMER 2
OVERFLOW
2
16
RCLK
TCLK
RX
CLOCK
TX
CLOCK
0
1
0
SMOD
TIMER 1
OVERFLOW
TRANSITION
DETECTOR
EXF
2
TIMER 2
INTERRUPT
NOTE: AVAILABILITY OF ADDITIONAL
EXTERNAL INTERRUPT
C/T2 = 0
C/T2 = 1
Figure 34. Timer 2, UART Baud Rates
Modes
and
Baud Rate
Timer Overflow Rate
SMOD
13
=
() × ()
232
1
Modes and
Baud Rate
Core Clock
TH
SMOD
13
=
()××
[]
()
232
12
256
1
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