參數(shù)資料
型號: ADUC7129BSTZ126
廠商: Analog Devices Inc
文件頁數(shù): 69/92頁
文件大小: 0K
描述: IC DAS MCU ARM7 ADC/DDS 80-LQFP
產(chǎn)品培訓(xùn)模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
標(biāo)準(zhǔn)包裝: 1
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 41.78MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設(shè)備: PLA,POR,PWM,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 38
程序存儲器容量: 126KB(63K x 16)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x12b; D/A 1x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 80-LQFP
包裝: 托盤
Rev. 0 | Page 71 of 92
Table 99. PLACLK MMR Bit Designations
Bit
Value
Description
7
Reserved.
Block 1 Clock Source Selection.
000
GPIO Clock on P0.5.
001
GPIO Clock on P0.0.
010
GPIO Clock on P0.7.
011
HCLK.
100
OCLK.
101
Timer1 Overflow.
110
Timer4 Overflow.
6:4
Other
Reserved.
3
Reserved.
Block 0 Clock Source Selection.
000
GPIO Clock on P0.5.
001
GPIO Clock on P0.0.
010
GPIO Clock on P0.7.
011
HCLK.
100
OCLK.
101
Timer1 Overflow.
110
Timer4 Overflow.
2:0
Other
Reserved.
Table 100. PLAIRQ MMR Bit Designations
Bit
Value
Description
15:13
Reserved.
12
PLA IRQ1 Enable Bit
Set by user to enable IRQ1 output from PLA
Cleared by user to disable IRQ1 output
from PLA
11:8
PLA IRQ1 Source.
0000
PLA Element 0.
0001
PLA Element 1.
1111
PLA Element 15.
7:5
Reserved.
4
PLA IRQ0 Enable Bit.
Set by user to enable IRQ0 output from PLA.
Cleared by user to disable IRQ0 output
from PLA.
3:0
PLA IRQ0 Source.
0000
PLA Element 0.
0001
PLA Element 1.
1111
PLA Element 15.
Table 101. PLAADC MMR Bit Designations
Bit
Value
Description
31:5
Reserved.
4
ADC Start Conversion Enable Bit.
Set by user to enable ADC start conversion
from PLA.
Cleared by user to disable ADC start
conversion from PLA.
3:0
ADC Start Conversion Source.
0000
PLA Element 0.
0001
PLA Element 1.
1111
PLA Element 15.
Table 102. PLADIN MMR Bit Designations
Bit
Description
31:16
Reserved.
15:0
Input Bit from Element 15 to Element 0.
Table 103. PLAOUT MMR Bit Designations
Bit
Description
31:16
Reserved.
15:0
Output Bit from Element 15 to Element 0.
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