參數資料
型號： ADUC7129BSTZ126
廠商： Analog Devices Inc
文件頁數： 11/92頁
文件大?。?/td> 0K
描述： IC DAS MCU ARM7 ADC/DDS 80-LQFP
產品培訓模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
標準包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 41.78MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設備： PLA，POR，PWM，PSM，溫度傳感器，WDT
輸入/輸出數： 38
程序存儲器容量： 126KB（63K x 16）
程序存儲器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數據轉換器： A/D 10x12b; D/A 1x10b
振蕩器型： 內部
工作溫度： -40°C ~ 125°C
封裝/外殼： 80-LQFP
包裝： 托盤
ADuC7128/ADuC7129
Rev. 0 | Page 19 of 92
Pin
No.
Mnemonic
Type1
Description
17
P4.6/SPM10/AD14
I/O
General-Purpose Input and Output Port 4.6/Serial Port Mux Pin 10/External Memory AD14.
18
P4.7/SPM11/AD15
I/O
General-Purpose Input and Output Port 4.7/Serial Port Mux Pin 11/External Memory AD15.
19
P0.0/BM/CMPOUT/MS0
I/O
General-Purpose Input and Output Port 0.0 /Boot Mode. The ADuC7129 enters download
mode if BM is low at reset and executes code if BM is pulled high at reset through a 1 kΩ
resistor/voltage comparator output/external memory MS0.
20
P0.6/T1/MRST
O
General-Purpose Output Port 0.6/Timer1 Input/Power-On Reset Output/External Memory AE.
21
TCK
I
JTAG Test Port Input, Test Clock. Debug and download access.
22
TDO/P0.2/BHE
O
JTAG Test Port Output, Test Data Out. Debug and download access/general-purpose input
and output Port 0.2/External Memory BHE.
23, 53, 67
IOGND
S
Ground for GPIO. Typically connected to DGND.
24, 54
IOVDD
S
3.3 V Supply for GPIO and Input of the On-Chip Voltage Regulator.
25
LVDD
S
2.5 V Output of the On-Chip Voltage Regulator. Must be connected to a 0.47 μF capacitor
to DGND.
26
DGND
S
Ground for Core Logic.
27
P3.0/PWM1/AD0
I/O
General-Purpose Input and Output Port 3.0/PWM1 Output/External Memory AD0.
28
P3.1/PWM2/AD1
I/O
General-Purpose Input and Output Port 3.1/PWM2 Output/External Memory AD1.
29
P3.2/PWM3/AD2
I/O
General-Purpose Input and Output Port 3.2/PWM3 Output/External Memory AD2.
30
P3.3/PWM4/AD3
I/O
General-Purpose Input and Output Port 3.3/PWM4 Output//External Memory AD3.
31
P2.4/MS0
I/O
General-Purpose Input and Output Port 2.4/Memory Select 0.
32
P0.3/ADCBUSY/TRST/A16
I/O
General-Purpose Input and Output Port 3.3/ADCBUSY Signal/JTAG Test Port Input, Test Reset.
Debug and download access/External Memory A16.
33
P2.5/MS1
I/O
General-Purpose Input and Output Port 2.5/Memory Select 1.
34
P2.6/MS2
I/O
General-Purpose Input and Output Port 2.6/Memory Select 2.
35
RST
I
Reset Input (Active Low).
36
P3.4/PWM5/AD4
I/O
General-Purpose Input and Output Port 3.4/PWM5 Output/External Memory AD4.
37
P3.5/PWM6/AD5
I/O
General-Purpose Input and Output Port 3.5/PWM6 Output/External Memory AD5.
38
P0.4/IRQ0/CONVST/MS1
I/O
General-Purpose Input and Output Port 0.5/External Interrupt Request 0, Active High/Start
Conversion Input Signal for ADC/External Memory MS1.
39
P0.5/IRQ1/ADCBUSY
I/O
General-Purpose Input and Output Port 0.6/External Interrupt Request 1, Active
High/ADCBUSY Signal.
40
P2.0/SPM9
I/O
General-Purpose Input and Output Port 2.0/Serial Port Mux Pin 9.
41
P0.7/SPM8/ECLK/XCLK
I/O
General-Purpose Input and Output Port 0.7/Serial Port Mux Pin 8/Output for the External
Clock Signal/Input to the Internal Clock Generator Circuits.
42
XCLKO
O
Output from the Crystal Oscillator Inverter.
43
XCLKI
I
Input to the Crystal Oscillator Inverter and Input to the Internal Clock Generator Circuits.
44
PVDD
S
2.5 V PLL Supply. Must be connected to a 0.1 μF capacitor to DGND. Should be connected
to 2.5 V LDO output.
45
DGND
S
Ground for PLL.
46
P3.6/AD6
I/O
General-Purpose Input and Output Port 3.6/External Memory AD6.
47
P3.7/AD7
I/O
General-Purpose Input and Output Port 3.7/External Memory AD7.
48
P2.7/MS3
I/O
General-Purpose Input and Output Port 2.7/Memory Select 3.
49
P2.1/WS
I/O
General-Purpose Input and Output Port 2.1/Memory Write Select.
50
P2.2/RS
I/O
General-Purpose Input and Output Port 2.1/Memory Read Select.
51
P1.7/SPM7
I/O
General-Purpose Input and Output Port 1.7/Serial Port Mux Pin 7.
52
P1.6/SPM6
I/O
General-Purpose Input and Output Port 1.6/Serial Port Mux Pin 6.
55
P4.0/S1/AD8
I/O
General-Purpose Input and Output Port 4.0/Quadrature Input 1/External Memory AD8.
56
P4.1/S2/AD9
I/O
General-Purpose Input and Output Port 4.1/Quadrature Input 2/External Memory AD9.
57
P1.5/SPM5
I/O
General-Purpose Input and Output Port 1.5/Serial Port Mux Pin 5.
58
P1.4/SPM4
I/O
General-Purpose Input and Output Port 1.4/Serial Port Mux Pin 4.
59
P1.3/SPM3
I/O
General-Purpose Input and Output Port 1.3/Serial Port Mux Pin 3.
60
P1.2/SPM2
I/O
General-Purpose Input and Output Port 1.2/Serial Port Mux Pin 2.
61
P1.1/SPM1
I/O
General-Purpose Input and Output Port 1.1/Serial Port Mux Pin 1.
62
P1.0/SPM0
I/O
General-Purpose Input and Output Port 1.0/Serial Port Mux Pin 0.
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